Searched refs:regUVD_LMI_VCPU_CACHE1_64BIT_BAR_HIGH (Results 1 – 5 of 5) sorted by relevance
| /openbmc/linux/drivers/gpu/drm/amd/amdgpu/ |
| H A D | vcn_v4_0_3.c | 366 WREG32_SOC15(VCN, vcn_inst, regUVD_LMI_VCPU_CACHE1_64BIT_BAR_HIGH, in vcn_v4_0_3_mc_resume()
461 VCN, 0, regUVD_LMI_VCPU_CACHE1_64BIT_BAR_HIGH), in vcn_v4_0_3_mc_resume_dpg_mode()
469 VCN, 0, regUVD_LMI_VCPU_CACHE1_64BIT_BAR_HIGH), 0, 0, indirect); in vcn_v4_0_3_mc_resume_dpg_mode()
932 regUVD_LMI_VCPU_CACHE1_64BIT_BAR_HIGH), upper_32_bits(cache_addr)); in vcn_v4_0_3_start_sriov()
|
| H A D | vcn_v4_0.c | 404 WREG32_SOC15(VCN, inst, regUVD_LMI_VCPU_CACHE1_64BIT_BAR_HIGH, in vcn_v4_0_mc_resume()
489 VCN, inst_idx, regUVD_LMI_VCPU_CACHE1_64BIT_BAR_HIGH), in vcn_v4_0_mc_resume_dpg_mode()
497 VCN, inst_idx, regUVD_LMI_VCPU_CACHE1_64BIT_BAR_HIGH), 0, 0, indirect); in vcn_v4_0_mc_resume_dpg_mode()
1303 regUVD_LMI_VCPU_CACHE1_64BIT_BAR_HIGH), in vcn_v4_0_start_sriov()
|
| /openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/vcn/ |
| H A D | vcn_2_6_0_offset.h | 304 #define regUVD_LMI_VCPU_CACHE1_64BIT_BAR_HIGH … macro
|
| H A D | vcn_4_0_0_offset.h | 670 #define regUVD_LMI_VCPU_CACHE1_64BIT_BAR_HIGH … macro
|
| H A D | vcn_4_0_3_offset.h | 672 #define regUVD_LMI_VCPU_CACHE1_64BIT_BAR_HIGH … macro
|