Home
last modified time | relevance | path

Searched refs:regUNIPHYA_CHANNEL_XBAR_CNTL_BASE_IDX (Results 1 – 10 of 10) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dpcs/
H A Ddpcs_3_1_4_offset.h6241 #define regUNIPHYA_CHANNEL_XBAR_CNTL_BASE_IDX … macro
H A Ddpcs_4_2_0_offset.h567 #define regUNIPHYA_CHANNEL_XBAR_CNTL_BASE_IDX … macro
H A Ddpcs_4_2_2_offset.h574 #define regUNIPHYA_CHANNEL_XBAR_CNTL_BASE_IDX … macro
H A Ddpcs_4_2_3_offset.h610 #define regUNIPHYA_CHANNEL_XBAR_CNTL_BASE_IDX … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_1_2_offset.h11782 #define regUNIPHYA_CHANNEL_XBAR_CNTL_BASE_IDX … macro
H A Ddcn_3_1_5_offset.h11527 #define regUNIPHYA_CHANNEL_XBAR_CNTL_BASE_IDX … macro
H A Ddcn_3_1_4_offset.h10893 #define regUNIPHYA_CHANNEL_XBAR_CNTL_BASE_IDX … macro
H A Ddcn_3_2_1_offset.h10919 #define regUNIPHYA_CHANNEL_XBAR_CNTL_BASE_IDX … macro
H A Ddcn_3_2_0_offset.h10918 #define regUNIPHYA_CHANNEL_XBAR_CNTL_BASE_IDX … macro
H A Ddcn_3_1_6_offset.h12010 #define regUNIPHYA_CHANNEL_XBAR_CNTL_BASE_IDX … macro