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Searched refs:regUNIPHYA_CHANNEL_XBAR_CNTL (Results 1 – 10 of 10) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dpcs/
H A Ddpcs_3_1_4_offset.h6240 #define regUNIPHYA_CHANNEL_XBAR_CNTL macro
H A Ddpcs_4_2_0_offset.h566 #define regUNIPHYA_CHANNEL_XBAR_CNTL macro
H A Ddpcs_4_2_2_offset.h573 #define regUNIPHYA_CHANNEL_XBAR_CNTL macro
H A Ddpcs_4_2_3_offset.h609 #define regUNIPHYA_CHANNEL_XBAR_CNTL macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_1_2_offset.h11781 #define regUNIPHYA_CHANNEL_XBAR_CNTL macro
H A Ddcn_3_1_5_offset.h11526 #define regUNIPHYA_CHANNEL_XBAR_CNTL macro
H A Ddcn_3_1_4_offset.h10892 #define regUNIPHYA_CHANNEL_XBAR_CNTL macro
H A Ddcn_3_2_1_offset.h10918 #define regUNIPHYA_CHANNEL_XBAR_CNTL macro
H A Ddcn_3_2_0_offset.h10917 #define regUNIPHYA_CHANNEL_XBAR_CNTL macro
H A Ddcn_3_1_6_offset.h12009 #define regUNIPHYA_CHANNEL_XBAR_CNTL macro