Home
last modified time | relevance | path

Searched refs:regSPI_COMPUTE_QUEUE_RESET (Results 1 – 5 of 5) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_4_3_offset.h3194 #define regSPI_COMPUTE_QUEUE_RESET … macro
H A Dgc_9_4_2_offset.h6018 #define regSPI_COMPUTE_QUEUE_RESET … macro
H A Dgc_11_0_3_offset.h4810 #define regSPI_COMPUTE_QUEUE_RESET … macro
H A Dgc_11_0_0_offset.h4586 #define regSPI_COMPUTE_QUEUE_RESET … macro
/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v11_0.c4459 WREG32_SOC15(GC, 0, regSPI_COMPUTE_QUEUE_RESET, 0x1); in gfx_v11_0_soft_reset()