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Searched refs:regSDMA0_QUEUE0_MINOR_PTR_UPDATE (Results 1 – 4 of 4) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_amdkfd_gfx_v11.c384 WREG32(sdma_rlc_reg_offset + regSDMA0_QUEUE0_MINOR_PTR_UPDATE, 1); in hqd_sdma_load_v11()
396 WREG32(sdma_rlc_reg_offset + regSDMA0_QUEUE0_MINOR_PTR_UPDATE, 0); in hqd_sdma_load_v11()
H A Dsdma_v6_0.c525 WREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_MINOR_PTR_UPDATE), 1); in sdma_v6_0_gfx_resume()
554 WREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_MINOR_PTR_UPDATE), 0); in sdma_v6_0_gfx_resume()
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_11_0_3_offset.h254 #define regSDMA0_QUEUE0_MINOR_PTR_UPDATE macro
H A Dgc_11_0_0_offset.h248 #define regSDMA0_QUEUE0_MINOR_PTR_UPDATE macro