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Searched refs:regSDMA0_QUEUE0_IB_CNTL (Results 1 – 3 of 3) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Dsdma_v6_0.c390 ib_cntl = RREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_IB_CNTL)); in sdma_v6_0_gfx_stop()
392 WREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_IB_CNTL), ib_cntl); in sdma_v6_0_gfx_stop()
583 ib_cntl = RREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_IB_CNTL)); in sdma_v6_0_gfx_resume()
589 WREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_IB_CNTL), ib_cntl); in sdma_v6_0_gfx_resume()
841 regSDMA0_QUEUE0_IB_CNTL)); in sdma_v6_0_mqd_init()
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_11_0_3_offset.h214 #define regSDMA0_QUEUE0_IB_CNTL … macro
H A Dgc_11_0_0_offset.h208 #define regSDMA0_QUEUE0_IB_CNTL … macro