Searched refs:regRLC_XT_INT_VEC_MUX_SEL (Results 1 – 2 of 2) sorted by relevance
| /openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/ | ||
| H A D | gc_11_0_3_offset.h | 10866 #define regRLC_XT_INT_VEC_MUX_SEL … macro |
| H A D | gc_11_0_0_offset.h | 10252 #define regRLC_XT_INT_VEC_MUX_SEL … macro |