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Searched refs:regRDPCSTX1_RDPCSTX_DMCU_DPALT_PHY_CNTL3_BASE_IDX (Results 1 – 4 of 4) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dpcs/
H A Ddpcs_3_1_4_offset.h6657 #define regRDPCSTX1_RDPCSTX_DMCU_DPALT_PHY_CNTL3_BASE_IDX … macro
H A Ddpcs_4_2_0_offset.h283 #define regRDPCSTX1_RDPCSTX_DMCU_DPALT_PHY_CNTL3_BASE_IDX … macro
H A Ddpcs_4_2_2_offset.h276 #define regRDPCSTX1_RDPCSTX_DMCU_DPALT_PHY_CNTL3_BASE_IDX … macro
H A Ddpcs_4_2_3_offset.h293 #define regRDPCSTX1_RDPCSTX_DMCU_DPALT_PHY_CNTL3_BASE_IDX … macro