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Searched refs:regPWRSEQ1_PANEL_PWRSEQ_STATE (Results 1 – 8 of 8) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dpcs/
H A Ddpcs_3_1_4_offset.h7194 #define regPWRSEQ1_PANEL_PWRSEQ_STATE … macro
H A Ddpcs_4_2_0_offset.h112 #define regPWRSEQ1_PANEL_PWRSEQ_STATE … macro
H A Ddpcs_4_2_2_offset.h99 #define regPWRSEQ1_PANEL_PWRSEQ_STATE … macro
H A Ddpcs_4_2_3_offset.h116 #define regPWRSEQ1_PANEL_PWRSEQ_STATE … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_1_2_offset.h12447 #define regPWRSEQ1_PANEL_PWRSEQ_STATE … macro
H A Ddcn_3_1_5_offset.h12312 #define regPWRSEQ1_PANEL_PWRSEQ_STATE … macro
H A Ddcn_3_1_4_offset.h11560 #define regPWRSEQ1_PANEL_PWRSEQ_STATE … macro
H A Ddcn_3_1_6_offset.h13043 #define regPWRSEQ1_PANEL_PWRSEQ_STATE … macro