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Searched refs:regHDP_MEM_POWER_CTRL (Results 1 – 5 of 5) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Dhdp_v6_0.c52 hdp_mem_pwr_cntl = RREG32_SOC15(HDP, 0, regHDP_MEM_POWER_CTRL); in hdp_v6_0_update_clock_gating()
77 WREG32_SOC15(HDP, 0, regHDP_MEM_POWER_CTRL, hdp_mem_pwr_cntl); in hdp_v6_0_update_clock_gating()
113 WREG32_SOC15(HDP, 0, regHDP_MEM_POWER_CTRL, hdp_mem_pwr_cntl); in hdp_v6_0_update_clock_gating()
129 tmp = RREG32_SOC15(HDP, 0, regHDP_MEM_POWER_CTRL); in hdp_v6_0_get_clockgating_state()
H A Dhdp_v5_2.c55 hdp_mem_pwr_cntl = RREG32_SOC15(HDP, 0, regHDP_MEM_POWER_CTRL); in hdp_v5_2_update_mem_power_gating()
81 WREG32_SOC15(HDP, 0, regHDP_MEM_POWER_CTRL, hdp_mem_pwr_cntl); in hdp_v5_2_update_mem_power_gating()
116 WREG32_SOC15(HDP, 0, regHDP_MEM_POWER_CTRL, hdp_mem_pwr_cntl); in hdp_v5_2_update_mem_power_gating()
175 tmp = RREG32_SOC15(HDP, 0, regHDP_MEM_POWER_CTRL); in hdp_v5_2_get_clockgating_state()
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/hdp/
H A Dhdp_6_0_0_offset.h60 #define regHDP_MEM_POWER_CTRL … macro
H A Dhdp_4_4_2_offset.h64 #define regHDP_MEM_POWER_CTRL … macro
H A Dhdp_5_2_1_offset.h64 #define regHDP_MEM_POWER_CTRL … macro