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Searched refs:regGFX_IMU_D_RAM_ADDR (Results 1 – 3 of 3) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Dimu_v11_0.c112 WREG32_SOC15(GC, 0, regGFX_IMU_D_RAM_ADDR, 0); in imu_v11_0_load_microcode()
117 WREG32_SOC15(GC, 0, regGFX_IMU_D_RAM_ADDR, adev->gfx.imu_fw_version); in imu_v11_0_load_microcode()
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_11_0_3_offset.h11700 #define regGFX_IMU_D_RAM_ADDR … macro
H A Dgc_11_0_0_offset.h11287 #define regGFX_IMU_D_RAM_ADDR … macro