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Searched refs:regGDS_OA_VMID0 (Results 1 – 6 of 6) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v9_4_3.c943 WREG32_SOC15_OFFSET(GC, GET_INST(GC, xcc_id), regGDS_OA_VMID0, i, 0); in gfx_v9_4_3_xcc_init_compute_vmid()
961 WREG32_SOC15_OFFSET(GC, GET_INST(GC, xcc_id), regGDS_OA_VMID0, vmid, 0); in gfx_v9_4_3_xcc_init_gds_vmid()
2168 SOC15_REG_OFFSET(GC, GET_INST(GC, 0), regGDS_OA_VMID0) + vmid, in gfx_v9_4_3_ring_emit_gds_switch()
H A Dgfx_v11_0.c1664 WREG32_SOC15_OFFSET(GC, 0, regGDS_OA_VMID0, i, 0); in gfx_v11_0_init_compute_vmid()
1682 WREG32_SOC15_OFFSET(GC, 0, regGDS_OA_VMID0, vmid, 0); in gfx_v11_0_init_gds_vmid()
4638 SOC15_REG_OFFSET(GC, 0, regGDS_OA_VMID0) + vmid, in gfx_v11_0_ring_emit_gds_switch()
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_4_3_offset.h3554 #define regGDS_OA_VMID0 … macro
H A Dgc_9_4_2_offset.h1374 #define regGDS_OA_VMID0 … macro
H A Dgc_11_0_3_offset.h5084 #define regGDS_OA_VMID0 … macro
H A Dgc_11_0_0_offset.h4860 #define regGDS_OA_VMID0 … macro