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Searched refs:regDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED21_BASE_IDX (Results 1 – 10 of 10) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dpcs/
H A Ddpcs_3_1_4_offset.h6735 #define regDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED21_BASE_IDX … macro
H A Ddpcs_4_2_0_offset.h871 #define regDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED21_BASE_IDX … macro
H A Ddpcs_4_2_2_offset.h878 #define regDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED21_BASE_IDX … macro
H A Ddpcs_4_2_3_offset.h914 #define regDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED21_BASE_IDX … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_1_2_offset.h12086 #define regDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED21_BASE_IDX … macro
H A Ddcn_3_1_5_offset.h11951 #define regDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED21_BASE_IDX … macro
H A Ddcn_3_1_4_offset.h11199 #define regDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED21_BASE_IDX … macro
H A Ddcn_3_2_1_offset.h11353 #define regDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED21_BASE_IDX … macro
H A Ddcn_3_2_0_offset.h11344 #define regDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED21_BASE_IDX … macro
H A Ddcn_3_1_6_offset.h12442 #define regDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED21_BASE_IDX … macro