Home
last modified time | relevance | path

Searched refs:regCP_RB0_BASE (Results 1 – 5 of 5) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_4_2_offset.h333 #define regCP_RB0_BASE … macro
H A Dgc_9_4_3_offset.h2784 #define regCP_RB0_BASE … macro
H A Dgc_11_0_0_offset.h4114 #define regCP_RB0_BASE … macro
H A Dgc_11_0_3_offset.h4330 #define regCP_RB0_BASE … macro
/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v11_0.c3283 WREG32_SOC15(GC, 0, regCP_RB0_BASE, rb_addr); in gfx_v11_0_cp_gfx_resume()