Searched refs:regCP_HQD_PQ_WPTR_POLL_ADDR_HI (Results 1 – 9 of 9) sorted by relevance
/openbmc/linux/drivers/gpu/drm/amd/amdgpu/ |
H A D | amdgpu_amdkfd_gc_9_4_3.c | 346 regCP_HQD_PQ_WPTR_POLL_ADDR_HI), in kgd_gfx_v9_4_3_hqd_load()
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H A D | amdgpu_amdkfd_gfx_v11.c | 240 WREG32(SOC15_REG_OFFSET(GC, 0, regCP_HQD_PQ_WPTR_POLL_ADDR_HI), in hqd_load_v11()
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H A D | mes_v11_0.c | 858 WREG32_SOC15(GC, 0, regCP_HQD_PQ_WPTR_POLL_ADDR_HI, in mes_v11_0_queue_init_register()
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H A D | gfx_v9_4_3.c | 1668 WREG32_SOC15_RLC(GC, GET_INST(GC, xcc_id), regCP_HQD_PQ_WPTR_POLL_ADDR_HI, in gfx_v9_4_3_xcc_kiq_init_register()
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H A D | gfx_v11_0.c | 3942 WREG32_SOC15(GC, 0, regCP_HQD_PQ_WPTR_POLL_ADDR_HI, in gfx_v11_0_kiq_init_register()
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/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/ |
H A D | gc_9_4_2_offset.h | 721 #define regCP_HQD_PQ_WPTR_POLL_ADDR_HI … macro
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H A D | gc_9_4_3_offset.h | 3310 #define regCP_HQD_PQ_WPTR_POLL_ADDR_HI … macro
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H A D | gc_11_0_0_offset.h | 4628 #define regCP_HQD_PQ_WPTR_POLL_ADDR_HI … macro
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H A D | gc_11_0_3_offset.h | 4852 #define regCP_HQD_PQ_WPTR_POLL_ADDR_HI … macro
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