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Searched refs:regCP_HQD_PERSISTENT_STATE (Results 1 – 7 of 7) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Dmes_v11_0.c866 WREG32_SOC15(GC, 0, regCP_HQD_PERSISTENT_STATE, mqd->cp_hqd_persistent_state); in mes_v11_0_queue_init_register()
H A Dgfx_v9_4_3.c1576 tmp = RREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_HQD_PERSISTENT_STATE); in gfx_v9_4_3_xcc_mqd_init()
1699 WREG32_SOC15_RLC(GC, GET_INST(GC, xcc_id), regCP_HQD_PERSISTENT_STATE, in gfx_v9_4_3_xcc_kiq_init_register()
1742 …WREG32_SOC15_RLC(GC, GET_INST(GC, xcc_id), regCP_HQD_PERSISTENT_STATE, CP_HQD_PERSISTENT_STATE_DEF… in gfx_v9_4_3_xcc_q_fini_register()
H A Dgfx_v11_0.c3850 tmp = RREG32_SOC15(GC, 0, regCP_HQD_PERSISTENT_STATE); in gfx_v11_0_compute_mqd_init()
3965 WREG32_SOC15(GC, 0, regCP_HQD_PERSISTENT_STATE, in gfx_v11_0_kiq_init_register()
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_4_2_offset.h701 #define regCP_HQD_PERSISTENT_STATE … macro
H A Dgc_9_4_3_offset.h3290 #define regCP_HQD_PERSISTENT_STATE … macro
H A Dgc_11_0_0_offset.h4608 #define regCP_HQD_PERSISTENT_STATE … macro
H A Dgc_11_0_3_offset.h4832 #define regCP_HQD_PERSISTENT_STATE … macro