/openbmc/qemu/hw/dma/ |
H A D | i8257.c | 643 qdev_prop_set_int32(d, "base", 0x00); in type_init() 644 qdev_prop_set_int32(d, "page-base", 0x80); in type_init() 645 qdev_prop_set_int32(d, "pageh-base", high_page_enable ? 0x480 : -1); in type_init() 646 qdev_prop_set_int32(d, "dshift", 0); in type_init() 652 qdev_prop_set_int32(d, "base", 0xc0); in type_init() 653 qdev_prop_set_int32(d, "page-base", 0x88); in type_init() 654 qdev_prop_set_int32(d, "pageh-base", high_page_enable ? 0x488 : -1); in type_init() 655 qdev_prop_set_int32(d, "dshift", 1); in type_init()
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H A D | pxa2xx_dma.c | 500 qdev_prop_set_int32(dev, "channels", PXA27X_DMA_NUM_CHANNELS); in pxa27x_dma_init() 514 qdev_prop_set_int32(dev, "channels", PXA27X_DMA_NUM_CHANNELS); in pxa255_dma_init()
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/openbmc/qemu/hw/ppc/ |
H A D | sam460ex.c | 434 qdev_prop_set_int32(dev, "busnum", 0); in sam460ex_init() 435 qdev_prop_set_int32(dev, "dcrn-base", PCIE0_DCRN_BASE); in sam460ex_init() 440 qdev_prop_set_int32(dev, "busnum", 1); in sam460ex_init() 441 qdev_prop_set_int32(dev, "dcrn-base", PCIE1_DCRN_BASE); in sam460ex_init()
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H A D | prep.c | 297 qdev_prop_set_int32(dev, "base_year", 1900); in ibm_40p_init()
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H A D | ppc405_boards.c | 493 qdev_prop_set_int32(dev, "base-year", 1968); in ref405ep_init()
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/openbmc/qemu/hw/isa/ |
H A D | piix.c | 342 qdev_prop_set_int32(DEVICE(&d->rtc), "base_year", 2000); in pci_piix_realize() 350 qdev_prop_set_int32(DEVICE(&d->ide), "addr", dev->devfn + 1); in pci_piix_realize() 358 qdev_prop_set_int32(DEVICE(&d->uhci), "addr", dev->devfn + 2); in pci_piix_realize() 367 qdev_prop_set_int32(DEVICE(&d->pm), "addr", dev->devfn + 3); in pci_piix_realize()
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H A D | vt82c686.c | 738 qdev_prop_set_int32(DEVICE(&s->rtc), "base_year", 2000); in via_isa_realize() 756 qdev_prop_set_int32(DEVICE(&s->ide), "addr", d->devfn + 1); in via_isa_realize() 767 qdev_prop_set_int32(DEVICE(&s->uhci[i]), "addr", d->devfn + 2 + i); in via_isa_realize() 774 qdev_prop_set_int32(DEVICE(&s->pm), "addr", d->devfn + 4); in via_isa_realize() 780 qdev_prop_set_int32(DEVICE(&s->ac97), "addr", d->devfn + 5); in via_isa_realize() 786 qdev_prop_set_int32(DEVICE(&s->mc97), "addr", d->devfn + 6); in via_isa_realize()
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H A D | lpc_ich9.c | 744 qdev_prop_set_int32(DEVICE(&lpc->rtc), "base_year", 2000); in ich9_lpc_realize()
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/openbmc/qemu/hw/pci-host/ |
H A D | gpex.c | 190 qdev_prop_set_int32(DEVICE(root), "addr", PCI_DEVFN(0, 0)); in gpex_host_initfn()
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H A D | xilinx-pcie.c | 155 qdev_prop_set_int32(DEVICE(root), "addr", PCI_DEVFN(0, 0)); in xilinx_pcie_host_init()
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H A D | designware.c | 751 qdev_prop_set_int32(DEVICE(root), "addr", PCI_DEVFN(0, 0)); in designware_pcie_host_init()
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H A D | q35.c | 214 qdev_prop_set_int32(DEVICE(&s->mch), "addr", PCI_DEVFN(0, 0)); in q35_host_initfn()
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/openbmc/qemu/include/hw/ |
H A D | qdev-properties.h | 193 void qdev_prop_set_int32(DeviceState *dev, const char *name, int32_t value);
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/openbmc/qemu/hw/arm/ |
H A D | pxa2xx_gpio.c | 271 qdev_prop_set_int32(dev, "lines", lines); in pxa2xx_gpio_init()
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H A D | nseries.c | 185 qdev_prop_set_int32(s->nand, "shift", 1); in n8x0_nand_setup()
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H A D | omap2.c | 2451 qdev_prop_set_int32(s->gpio, "mpu_model", s->mpu_model); in omap2420_mpu_init()
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H A D | omap1.c | 4009 qdev_prop_set_int32(s->gpio, "mpu_model", s->mpu_model); in omap310_mpu_init()
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/openbmc/qemu/hw/i386/ |
H A D | pc_piix.c | 292 qdev_prop_set_int32(DEVICE(x86ms->rtc), "base_year", 2000); in pc_init1()
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/openbmc/qemu/hw/sparc64/ |
H A D | sun4u.c | 673 qdev_prop_set_int32(dev, "base-year", 1968); in sun4uv_init()
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/openbmc/qemu/hw/rtc/ |
H A D | mc146818rtc.c | 949 qdev_prop_set_int32(dev, "base_year", base_year); in mc146818_rtc_init()
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/openbmc/qemu/hw/core/ |
H A D | qdev-properties.c | 826 void qdev_prop_set_int32(DeviceState *dev, const char *name, int32_t value) in qdev_prop_set_int32() function
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/openbmc/qemu/hw/sparc/ |
H A D | sun4m.c | 958 qdev_prop_set_int32(dev, "base-year", 1968); in sun4m_hw_init()
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/openbmc/qemu/hw/pci/ |
H A D | pci.c | 2173 qdev_prop_set_int32(dev, "addr", devfn); in pci_new_internal()
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