1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Bluetooth Software UART Qualcomm protocol
4 *
5 * HCI_IBS (HCI In-Band Sleep) is Qualcomm's power management
6 * protocol extension to H4.
7 *
8 * Copyright (C) 2007 Texas Instruments, Inc.
9 * Copyright (c) 2010, 2012, 2018 The Linux Foundation. All rights reserved.
10 *
11 * Acknowledgements:
12 * This file is based on hci_ll.c, which was...
13 * Written by Ohad Ben-Cohen <ohad@bencohen.org>
14 * which was in turn based on hci_h4.c, which was written
15 * by Maxim Krasnyansky and Marcel Holtmann.
16 */
17
18 #include <linux/kernel.h>
19 #include <linux/clk.h>
20 #include <linux/completion.h>
21 #include <linux/debugfs.h>
22 #include <linux/delay.h>
23 #include <linux/devcoredump.h>
24 #include <linux/device.h>
25 #include <linux/gpio/consumer.h>
26 #include <linux/mod_devicetable.h>
27 #include <linux/module.h>
28 #include <linux/of.h>
29 #include <linux/acpi.h>
30 #include <linux/platform_device.h>
31 #include <linux/regulator/consumer.h>
32 #include <linux/serdev.h>
33 #include <linux/mutex.h>
34 #include <asm/unaligned.h>
35
36 #include <net/bluetooth/bluetooth.h>
37 #include <net/bluetooth/hci_core.h>
38
39 #include "hci_uart.h"
40 #include "btqca.h"
41
42 /* HCI_IBS protocol messages */
43 #define HCI_IBS_SLEEP_IND 0xFE
44 #define HCI_IBS_WAKE_IND 0xFD
45 #define HCI_IBS_WAKE_ACK 0xFC
46 #define HCI_MAX_IBS_SIZE 10
47
48 #define IBS_WAKE_RETRANS_TIMEOUT_MS 100
49 #define IBS_BTSOC_TX_IDLE_TIMEOUT_MS 200
50 #define IBS_HOST_TX_IDLE_TIMEOUT_MS 2000
51 #define CMD_TRANS_TIMEOUT_MS 100
52 #define MEMDUMP_TIMEOUT_MS 8000
53 #define IBS_DISABLE_SSR_TIMEOUT_MS \
54 (MEMDUMP_TIMEOUT_MS + FW_DOWNLOAD_TIMEOUT_MS)
55 #define FW_DOWNLOAD_TIMEOUT_MS 3000
56
57 /* susclk rate */
58 #define SUSCLK_RATE_32KHZ 32768
59
60 /* Controller debug log header */
61 #define QCA_DEBUG_HANDLE 0x2EDC
62
63 /* max retry count when init fails */
64 #define MAX_INIT_RETRIES 3
65
66 /* Controller dump header */
67 #define QCA_SSR_DUMP_HANDLE 0x0108
68 #define QCA_DUMP_PACKET_SIZE 255
69 #define QCA_LAST_SEQUENCE_NUM 0xFFFF
70 #define QCA_CRASHBYTE_PACKET_LEN 1096
71 #define QCA_MEMDUMP_BYTE 0xFB
72
73 enum qca_flags {
74 QCA_IBS_DISABLED,
75 QCA_DROP_VENDOR_EVENT,
76 QCA_SUSPENDING,
77 QCA_MEMDUMP_COLLECTION,
78 QCA_HW_ERROR_EVENT,
79 QCA_SSR_TRIGGERED,
80 QCA_BT_OFF,
81 QCA_ROM_FW,
82 QCA_DEBUGFS_CREATED,
83 };
84
85 enum qca_capabilities {
86 QCA_CAP_WIDEBAND_SPEECH = BIT(0),
87 QCA_CAP_VALID_LE_STATES = BIT(1),
88 };
89
90 /* HCI_IBS transmit side sleep protocol states */
91 enum tx_ibs_states {
92 HCI_IBS_TX_ASLEEP,
93 HCI_IBS_TX_WAKING,
94 HCI_IBS_TX_AWAKE,
95 };
96
97 /* HCI_IBS receive side sleep protocol states */
98 enum rx_states {
99 HCI_IBS_RX_ASLEEP,
100 HCI_IBS_RX_AWAKE,
101 };
102
103 /* HCI_IBS transmit and receive side clock state vote */
104 enum hci_ibs_clock_state_vote {
105 HCI_IBS_VOTE_STATS_UPDATE,
106 HCI_IBS_TX_VOTE_CLOCK_ON,
107 HCI_IBS_TX_VOTE_CLOCK_OFF,
108 HCI_IBS_RX_VOTE_CLOCK_ON,
109 HCI_IBS_RX_VOTE_CLOCK_OFF,
110 };
111
112 /* Controller memory dump states */
113 enum qca_memdump_states {
114 QCA_MEMDUMP_IDLE,
115 QCA_MEMDUMP_COLLECTING,
116 QCA_MEMDUMP_COLLECTED,
117 QCA_MEMDUMP_TIMEOUT,
118 };
119
120 struct qca_memdump_info {
121 u32 current_seq_no;
122 u32 received_dump;
123 u32 ram_dump_size;
124 };
125
126 struct qca_memdump_event_hdr {
127 __u8 evt;
128 __u8 plen;
129 __u16 opcode;
130 __le16 seq_no;
131 __u8 reserved;
132 } __packed;
133
134
135 struct qca_dump_size {
136 __le32 dump_size;
137 } __packed;
138
139 struct qca_data {
140 struct hci_uart *hu;
141 struct sk_buff *rx_skb;
142 struct sk_buff_head txq;
143 struct sk_buff_head tx_wait_q; /* HCI_IBS wait queue */
144 struct sk_buff_head rx_memdump_q; /* Memdump wait queue */
145 spinlock_t hci_ibs_lock; /* HCI_IBS state lock */
146 u8 tx_ibs_state; /* HCI_IBS transmit side power state*/
147 u8 rx_ibs_state; /* HCI_IBS receive side power state */
148 bool tx_vote; /* Clock must be on for TX */
149 bool rx_vote; /* Clock must be on for RX */
150 struct timer_list tx_idle_timer;
151 u32 tx_idle_delay;
152 struct timer_list wake_retrans_timer;
153 u32 wake_retrans;
154 struct workqueue_struct *workqueue;
155 struct work_struct ws_awake_rx;
156 struct work_struct ws_awake_device;
157 struct work_struct ws_rx_vote_off;
158 struct work_struct ws_tx_vote_off;
159 struct work_struct ctrl_memdump_evt;
160 struct delayed_work ctrl_memdump_timeout;
161 struct qca_memdump_info *qca_memdump;
162 unsigned long flags;
163 struct completion drop_ev_comp;
164 wait_queue_head_t suspend_wait_q;
165 enum qca_memdump_states memdump_state;
166 struct mutex hci_memdump_lock;
167
168 u16 fw_version;
169 u16 controller_id;
170 /* For debugging purpose */
171 u64 ibs_sent_wacks;
172 u64 ibs_sent_slps;
173 u64 ibs_sent_wakes;
174 u64 ibs_recv_wacks;
175 u64 ibs_recv_slps;
176 u64 ibs_recv_wakes;
177 u64 vote_last_jif;
178 u32 vote_on_ms;
179 u32 vote_off_ms;
180 u64 tx_votes_on;
181 u64 rx_votes_on;
182 u64 tx_votes_off;
183 u64 rx_votes_off;
184 u64 votes_on;
185 u64 votes_off;
186 };
187
188 enum qca_speed_type {
189 QCA_INIT_SPEED = 1,
190 QCA_OPER_SPEED
191 };
192
193 /*
194 * Voltage regulator information required for configuring the
195 * QCA Bluetooth chipset
196 */
197 struct qca_vreg {
198 const char *name;
199 unsigned int load_uA;
200 };
201
202 struct qca_device_data {
203 enum qca_btsoc_type soc_type;
204 struct qca_vreg *vregs;
205 size_t num_vregs;
206 uint32_t capabilities;
207 };
208
209 /*
210 * Platform data for the QCA Bluetooth power driver.
211 */
212 struct qca_power {
213 struct device *dev;
214 struct regulator_bulk_data *vreg_bulk;
215 int num_vregs;
216 bool vregs_on;
217 };
218
219 struct qca_serdev {
220 struct hci_uart serdev_hu;
221 struct gpio_desc *bt_en;
222 struct gpio_desc *sw_ctrl;
223 struct clk *susclk;
224 enum qca_btsoc_type btsoc_type;
225 struct qca_power *bt_power;
226 u32 init_speed;
227 u32 oper_speed;
228 bool bdaddr_property_broken;
229 const char *firmware_name;
230 };
231
232 static int qca_regulator_enable(struct qca_serdev *qcadev);
233 static void qca_regulator_disable(struct qca_serdev *qcadev);
234 static void qca_power_shutdown(struct hci_uart *hu);
235 static int qca_power_off(struct hci_dev *hdev);
236 static void qca_controller_memdump(struct work_struct *work);
237 static void qca_dmp_hdr(struct hci_dev *hdev, struct sk_buff *skb);
238
qca_soc_type(struct hci_uart * hu)239 static enum qca_btsoc_type qca_soc_type(struct hci_uart *hu)
240 {
241 enum qca_btsoc_type soc_type;
242
243 if (hu->serdev) {
244 struct qca_serdev *qsd = serdev_device_get_drvdata(hu->serdev);
245
246 soc_type = qsd->btsoc_type;
247 } else {
248 soc_type = QCA_ROME;
249 }
250
251 return soc_type;
252 }
253
qca_get_firmware_name(struct hci_uart * hu)254 static const char *qca_get_firmware_name(struct hci_uart *hu)
255 {
256 if (hu->serdev) {
257 struct qca_serdev *qsd = serdev_device_get_drvdata(hu->serdev);
258
259 return qsd->firmware_name;
260 } else {
261 return NULL;
262 }
263 }
264
__serial_clock_on(struct tty_struct * tty)265 static void __serial_clock_on(struct tty_struct *tty)
266 {
267 /* TODO: Some chipset requires to enable UART clock on client
268 * side to save power consumption or manual work is required.
269 * Please put your code to control UART clock here if needed
270 */
271 }
272
__serial_clock_off(struct tty_struct * tty)273 static void __serial_clock_off(struct tty_struct *tty)
274 {
275 /* TODO: Some chipset requires to disable UART clock on client
276 * side to save power consumption or manual work is required.
277 * Please put your code to control UART clock off here if needed
278 */
279 }
280
281 /* serial_clock_vote needs to be called with the ibs lock held */
serial_clock_vote(unsigned long vote,struct hci_uart * hu)282 static void serial_clock_vote(unsigned long vote, struct hci_uart *hu)
283 {
284 struct qca_data *qca = hu->priv;
285 unsigned int diff;
286
287 bool old_vote = (qca->tx_vote | qca->rx_vote);
288 bool new_vote;
289
290 switch (vote) {
291 case HCI_IBS_VOTE_STATS_UPDATE:
292 diff = jiffies_to_msecs(jiffies - qca->vote_last_jif);
293
294 if (old_vote)
295 qca->vote_off_ms += diff;
296 else
297 qca->vote_on_ms += diff;
298 return;
299
300 case HCI_IBS_TX_VOTE_CLOCK_ON:
301 qca->tx_vote = true;
302 qca->tx_votes_on++;
303 break;
304
305 case HCI_IBS_RX_VOTE_CLOCK_ON:
306 qca->rx_vote = true;
307 qca->rx_votes_on++;
308 break;
309
310 case HCI_IBS_TX_VOTE_CLOCK_OFF:
311 qca->tx_vote = false;
312 qca->tx_votes_off++;
313 break;
314
315 case HCI_IBS_RX_VOTE_CLOCK_OFF:
316 qca->rx_vote = false;
317 qca->rx_votes_off++;
318 break;
319
320 default:
321 BT_ERR("Voting irregularity");
322 return;
323 }
324
325 new_vote = qca->rx_vote | qca->tx_vote;
326
327 if (new_vote != old_vote) {
328 if (new_vote)
329 __serial_clock_on(hu->tty);
330 else
331 __serial_clock_off(hu->tty);
332
333 BT_DBG("Vote serial clock %s(%s)", new_vote ? "true" : "false",
334 vote ? "true" : "false");
335
336 diff = jiffies_to_msecs(jiffies - qca->vote_last_jif);
337
338 if (new_vote) {
339 qca->votes_on++;
340 qca->vote_off_ms += diff;
341 } else {
342 qca->votes_off++;
343 qca->vote_on_ms += diff;
344 }
345 qca->vote_last_jif = jiffies;
346 }
347 }
348
349 /* Builds and sends an HCI_IBS command packet.
350 * These are very simple packets with only 1 cmd byte.
351 */
send_hci_ibs_cmd(u8 cmd,struct hci_uart * hu)352 static int send_hci_ibs_cmd(u8 cmd, struct hci_uart *hu)
353 {
354 int err = 0;
355 struct sk_buff *skb = NULL;
356 struct qca_data *qca = hu->priv;
357
358 BT_DBG("hu %p send hci ibs cmd 0x%x", hu, cmd);
359
360 skb = bt_skb_alloc(1, GFP_ATOMIC);
361 if (!skb) {
362 BT_ERR("Failed to allocate memory for HCI_IBS packet");
363 return -ENOMEM;
364 }
365
366 /* Assign HCI_IBS type */
367 skb_put_u8(skb, cmd);
368
369 skb_queue_tail(&qca->txq, skb);
370
371 return err;
372 }
373
qca_wq_awake_device(struct work_struct * work)374 static void qca_wq_awake_device(struct work_struct *work)
375 {
376 struct qca_data *qca = container_of(work, struct qca_data,
377 ws_awake_device);
378 struct hci_uart *hu = qca->hu;
379 unsigned long retrans_delay;
380 unsigned long flags;
381
382 BT_DBG("hu %p wq awake device", hu);
383
384 /* Vote for serial clock */
385 serial_clock_vote(HCI_IBS_TX_VOTE_CLOCK_ON, hu);
386
387 spin_lock_irqsave(&qca->hci_ibs_lock, flags);
388
389 /* Send wake indication to device */
390 if (send_hci_ibs_cmd(HCI_IBS_WAKE_IND, hu) < 0)
391 BT_ERR("Failed to send WAKE to device");
392
393 qca->ibs_sent_wakes++;
394
395 /* Start retransmit timer */
396 retrans_delay = msecs_to_jiffies(qca->wake_retrans);
397 mod_timer(&qca->wake_retrans_timer, jiffies + retrans_delay);
398
399 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
400
401 /* Actually send the packets */
402 hci_uart_tx_wakeup(hu);
403 }
404
qca_wq_awake_rx(struct work_struct * work)405 static void qca_wq_awake_rx(struct work_struct *work)
406 {
407 struct qca_data *qca = container_of(work, struct qca_data,
408 ws_awake_rx);
409 struct hci_uart *hu = qca->hu;
410 unsigned long flags;
411
412 BT_DBG("hu %p wq awake rx", hu);
413
414 serial_clock_vote(HCI_IBS_RX_VOTE_CLOCK_ON, hu);
415
416 spin_lock_irqsave(&qca->hci_ibs_lock, flags);
417 qca->rx_ibs_state = HCI_IBS_RX_AWAKE;
418
419 /* Always acknowledge device wake up,
420 * sending IBS message doesn't count as TX ON.
421 */
422 if (send_hci_ibs_cmd(HCI_IBS_WAKE_ACK, hu) < 0)
423 BT_ERR("Failed to acknowledge device wake up");
424
425 qca->ibs_sent_wacks++;
426
427 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
428
429 /* Actually send the packets */
430 hci_uart_tx_wakeup(hu);
431 }
432
qca_wq_serial_rx_clock_vote_off(struct work_struct * work)433 static void qca_wq_serial_rx_clock_vote_off(struct work_struct *work)
434 {
435 struct qca_data *qca = container_of(work, struct qca_data,
436 ws_rx_vote_off);
437 struct hci_uart *hu = qca->hu;
438
439 BT_DBG("hu %p rx clock vote off", hu);
440
441 serial_clock_vote(HCI_IBS_RX_VOTE_CLOCK_OFF, hu);
442 }
443
qca_wq_serial_tx_clock_vote_off(struct work_struct * work)444 static void qca_wq_serial_tx_clock_vote_off(struct work_struct *work)
445 {
446 struct qca_data *qca = container_of(work, struct qca_data,
447 ws_tx_vote_off);
448 struct hci_uart *hu = qca->hu;
449
450 BT_DBG("hu %p tx clock vote off", hu);
451
452 /* Run HCI tx handling unlocked */
453 hci_uart_tx_wakeup(hu);
454
455 /* Now that message queued to tty driver, vote for tty clocks off.
456 * It is up to the tty driver to pend the clocks off until tx done.
457 */
458 serial_clock_vote(HCI_IBS_TX_VOTE_CLOCK_OFF, hu);
459 }
460
hci_ibs_tx_idle_timeout(struct timer_list * t)461 static void hci_ibs_tx_idle_timeout(struct timer_list *t)
462 {
463 struct qca_data *qca = from_timer(qca, t, tx_idle_timer);
464 struct hci_uart *hu = qca->hu;
465 unsigned long flags;
466
467 BT_DBG("hu %p idle timeout in %d state", hu, qca->tx_ibs_state);
468
469 spin_lock_irqsave_nested(&qca->hci_ibs_lock,
470 flags, SINGLE_DEPTH_NESTING);
471
472 switch (qca->tx_ibs_state) {
473 case HCI_IBS_TX_AWAKE:
474 /* TX_IDLE, go to SLEEP */
475 if (send_hci_ibs_cmd(HCI_IBS_SLEEP_IND, hu) < 0) {
476 BT_ERR("Failed to send SLEEP to device");
477 break;
478 }
479 qca->tx_ibs_state = HCI_IBS_TX_ASLEEP;
480 qca->ibs_sent_slps++;
481 queue_work(qca->workqueue, &qca->ws_tx_vote_off);
482 break;
483
484 case HCI_IBS_TX_ASLEEP:
485 case HCI_IBS_TX_WAKING:
486 default:
487 BT_ERR("Spurious timeout tx state %d", qca->tx_ibs_state);
488 break;
489 }
490
491 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
492 }
493
hci_ibs_wake_retrans_timeout(struct timer_list * t)494 static void hci_ibs_wake_retrans_timeout(struct timer_list *t)
495 {
496 struct qca_data *qca = from_timer(qca, t, wake_retrans_timer);
497 struct hci_uart *hu = qca->hu;
498 unsigned long flags, retrans_delay;
499 bool retransmit = false;
500
501 BT_DBG("hu %p wake retransmit timeout in %d state",
502 hu, qca->tx_ibs_state);
503
504 spin_lock_irqsave_nested(&qca->hci_ibs_lock,
505 flags, SINGLE_DEPTH_NESTING);
506
507 /* Don't retransmit the HCI_IBS_WAKE_IND when suspending. */
508 if (test_bit(QCA_SUSPENDING, &qca->flags)) {
509 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
510 return;
511 }
512
513 switch (qca->tx_ibs_state) {
514 case HCI_IBS_TX_WAKING:
515 /* No WAKE_ACK, retransmit WAKE */
516 retransmit = true;
517 if (send_hci_ibs_cmd(HCI_IBS_WAKE_IND, hu) < 0) {
518 BT_ERR("Failed to acknowledge device wake up");
519 break;
520 }
521 qca->ibs_sent_wakes++;
522 retrans_delay = msecs_to_jiffies(qca->wake_retrans);
523 mod_timer(&qca->wake_retrans_timer, jiffies + retrans_delay);
524 break;
525
526 case HCI_IBS_TX_ASLEEP:
527 case HCI_IBS_TX_AWAKE:
528 default:
529 BT_ERR("Spurious timeout tx state %d", qca->tx_ibs_state);
530 break;
531 }
532
533 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
534
535 if (retransmit)
536 hci_uart_tx_wakeup(hu);
537 }
538
539
qca_controller_memdump_timeout(struct work_struct * work)540 static void qca_controller_memdump_timeout(struct work_struct *work)
541 {
542 struct qca_data *qca = container_of(work, struct qca_data,
543 ctrl_memdump_timeout.work);
544 struct hci_uart *hu = qca->hu;
545
546 mutex_lock(&qca->hci_memdump_lock);
547 if (test_bit(QCA_MEMDUMP_COLLECTION, &qca->flags)) {
548 qca->memdump_state = QCA_MEMDUMP_TIMEOUT;
549 if (!test_bit(QCA_HW_ERROR_EVENT, &qca->flags)) {
550 /* Inject hw error event to reset the device
551 * and driver.
552 */
553 hci_reset_dev(hu->hdev);
554 }
555 }
556
557 mutex_unlock(&qca->hci_memdump_lock);
558 }
559
560
561 /* Initialize protocol */
qca_open(struct hci_uart * hu)562 static int qca_open(struct hci_uart *hu)
563 {
564 struct qca_serdev *qcadev;
565 struct qca_data *qca;
566
567 BT_DBG("hu %p qca_open", hu);
568
569 if (!hci_uart_has_flow_control(hu))
570 return -EOPNOTSUPP;
571
572 qca = kzalloc(sizeof(struct qca_data), GFP_KERNEL);
573 if (!qca)
574 return -ENOMEM;
575
576 skb_queue_head_init(&qca->txq);
577 skb_queue_head_init(&qca->tx_wait_q);
578 skb_queue_head_init(&qca->rx_memdump_q);
579 spin_lock_init(&qca->hci_ibs_lock);
580 mutex_init(&qca->hci_memdump_lock);
581 qca->workqueue = alloc_ordered_workqueue("qca_wq", 0);
582 if (!qca->workqueue) {
583 BT_ERR("QCA Workqueue not initialized properly");
584 kfree(qca);
585 return -ENOMEM;
586 }
587
588 INIT_WORK(&qca->ws_awake_rx, qca_wq_awake_rx);
589 INIT_WORK(&qca->ws_awake_device, qca_wq_awake_device);
590 INIT_WORK(&qca->ws_rx_vote_off, qca_wq_serial_rx_clock_vote_off);
591 INIT_WORK(&qca->ws_tx_vote_off, qca_wq_serial_tx_clock_vote_off);
592 INIT_WORK(&qca->ctrl_memdump_evt, qca_controller_memdump);
593 INIT_DELAYED_WORK(&qca->ctrl_memdump_timeout,
594 qca_controller_memdump_timeout);
595 init_waitqueue_head(&qca->suspend_wait_q);
596
597 qca->hu = hu;
598 init_completion(&qca->drop_ev_comp);
599
600 /* Assume we start with both sides asleep -- extra wakes OK */
601 qca->tx_ibs_state = HCI_IBS_TX_ASLEEP;
602 qca->rx_ibs_state = HCI_IBS_RX_ASLEEP;
603
604 qca->vote_last_jif = jiffies;
605
606 hu->priv = qca;
607
608 if (hu->serdev) {
609 qcadev = serdev_device_get_drvdata(hu->serdev);
610
611 switch (qcadev->btsoc_type) {
612 case QCA_WCN3988:
613 case QCA_WCN3990:
614 case QCA_WCN3991:
615 case QCA_WCN3998:
616 case QCA_WCN6750:
617 hu->init_speed = qcadev->init_speed;
618 break;
619
620 default:
621 break;
622 }
623
624 if (qcadev->oper_speed)
625 hu->oper_speed = qcadev->oper_speed;
626 }
627
628 timer_setup(&qca->wake_retrans_timer, hci_ibs_wake_retrans_timeout, 0);
629 qca->wake_retrans = IBS_WAKE_RETRANS_TIMEOUT_MS;
630
631 timer_setup(&qca->tx_idle_timer, hci_ibs_tx_idle_timeout, 0);
632 qca->tx_idle_delay = IBS_HOST_TX_IDLE_TIMEOUT_MS;
633
634 BT_DBG("HCI_UART_QCA open, tx_idle_delay=%u, wake_retrans=%u",
635 qca->tx_idle_delay, qca->wake_retrans);
636
637 return 0;
638 }
639
qca_debugfs_init(struct hci_dev * hdev)640 static void qca_debugfs_init(struct hci_dev *hdev)
641 {
642 struct hci_uart *hu = hci_get_drvdata(hdev);
643 struct qca_data *qca = hu->priv;
644 struct dentry *ibs_dir;
645 umode_t mode;
646
647 if (!hdev->debugfs)
648 return;
649
650 if (test_and_set_bit(QCA_DEBUGFS_CREATED, &qca->flags))
651 return;
652
653 ibs_dir = debugfs_create_dir("ibs", hdev->debugfs);
654
655 /* read only */
656 mode = 0444;
657 debugfs_create_u8("tx_ibs_state", mode, ibs_dir, &qca->tx_ibs_state);
658 debugfs_create_u8("rx_ibs_state", mode, ibs_dir, &qca->rx_ibs_state);
659 debugfs_create_u64("ibs_sent_sleeps", mode, ibs_dir,
660 &qca->ibs_sent_slps);
661 debugfs_create_u64("ibs_sent_wakes", mode, ibs_dir,
662 &qca->ibs_sent_wakes);
663 debugfs_create_u64("ibs_sent_wake_acks", mode, ibs_dir,
664 &qca->ibs_sent_wacks);
665 debugfs_create_u64("ibs_recv_sleeps", mode, ibs_dir,
666 &qca->ibs_recv_slps);
667 debugfs_create_u64("ibs_recv_wakes", mode, ibs_dir,
668 &qca->ibs_recv_wakes);
669 debugfs_create_u64("ibs_recv_wake_acks", mode, ibs_dir,
670 &qca->ibs_recv_wacks);
671 debugfs_create_bool("tx_vote", mode, ibs_dir, &qca->tx_vote);
672 debugfs_create_u64("tx_votes_on", mode, ibs_dir, &qca->tx_votes_on);
673 debugfs_create_u64("tx_votes_off", mode, ibs_dir, &qca->tx_votes_off);
674 debugfs_create_bool("rx_vote", mode, ibs_dir, &qca->rx_vote);
675 debugfs_create_u64("rx_votes_on", mode, ibs_dir, &qca->rx_votes_on);
676 debugfs_create_u64("rx_votes_off", mode, ibs_dir, &qca->rx_votes_off);
677 debugfs_create_u64("votes_on", mode, ibs_dir, &qca->votes_on);
678 debugfs_create_u64("votes_off", mode, ibs_dir, &qca->votes_off);
679 debugfs_create_u32("vote_on_ms", mode, ibs_dir, &qca->vote_on_ms);
680 debugfs_create_u32("vote_off_ms", mode, ibs_dir, &qca->vote_off_ms);
681
682 /* read/write */
683 mode = 0644;
684 debugfs_create_u32("wake_retrans", mode, ibs_dir, &qca->wake_retrans);
685 debugfs_create_u32("tx_idle_delay", mode, ibs_dir,
686 &qca->tx_idle_delay);
687 }
688
689 /* Flush protocol data */
qca_flush(struct hci_uart * hu)690 static int qca_flush(struct hci_uart *hu)
691 {
692 struct qca_data *qca = hu->priv;
693
694 BT_DBG("hu %p qca flush", hu);
695
696 skb_queue_purge(&qca->tx_wait_q);
697 skb_queue_purge(&qca->txq);
698
699 return 0;
700 }
701
702 /* Close protocol */
qca_close(struct hci_uart * hu)703 static int qca_close(struct hci_uart *hu)
704 {
705 struct qca_data *qca = hu->priv;
706
707 BT_DBG("hu %p qca close", hu);
708
709 serial_clock_vote(HCI_IBS_VOTE_STATS_UPDATE, hu);
710
711 skb_queue_purge(&qca->tx_wait_q);
712 skb_queue_purge(&qca->txq);
713 skb_queue_purge(&qca->rx_memdump_q);
714 /*
715 * Shut the timers down so they can't be rearmed when
716 * destroy_workqueue() drains pending work which in turn might try
717 * to arm a timer. After shutdown rearm attempts are silently
718 * ignored by the timer core code.
719 */
720 timer_shutdown_sync(&qca->tx_idle_timer);
721 timer_shutdown_sync(&qca->wake_retrans_timer);
722 destroy_workqueue(qca->workqueue);
723 qca->hu = NULL;
724
725 kfree_skb(qca->rx_skb);
726
727 hu->priv = NULL;
728
729 kfree(qca);
730
731 return 0;
732 }
733
734 /* Called upon a wake-up-indication from the device.
735 */
device_want_to_wakeup(struct hci_uart * hu)736 static void device_want_to_wakeup(struct hci_uart *hu)
737 {
738 unsigned long flags;
739 struct qca_data *qca = hu->priv;
740
741 BT_DBG("hu %p want to wake up", hu);
742
743 spin_lock_irqsave(&qca->hci_ibs_lock, flags);
744
745 qca->ibs_recv_wakes++;
746
747 /* Don't wake the rx up when suspending. */
748 if (test_bit(QCA_SUSPENDING, &qca->flags)) {
749 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
750 return;
751 }
752
753 switch (qca->rx_ibs_state) {
754 case HCI_IBS_RX_ASLEEP:
755 /* Make sure clock is on - we may have turned clock off since
756 * receiving the wake up indicator awake rx clock.
757 */
758 queue_work(qca->workqueue, &qca->ws_awake_rx);
759 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
760 return;
761
762 case HCI_IBS_RX_AWAKE:
763 /* Always acknowledge device wake up,
764 * sending IBS message doesn't count as TX ON.
765 */
766 if (send_hci_ibs_cmd(HCI_IBS_WAKE_ACK, hu) < 0) {
767 BT_ERR("Failed to acknowledge device wake up");
768 break;
769 }
770 qca->ibs_sent_wacks++;
771 break;
772
773 default:
774 /* Any other state is illegal */
775 BT_ERR("Received HCI_IBS_WAKE_IND in rx state %d",
776 qca->rx_ibs_state);
777 break;
778 }
779
780 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
781
782 /* Actually send the packets */
783 hci_uart_tx_wakeup(hu);
784 }
785
786 /* Called upon a sleep-indication from the device.
787 */
device_want_to_sleep(struct hci_uart * hu)788 static void device_want_to_sleep(struct hci_uart *hu)
789 {
790 unsigned long flags;
791 struct qca_data *qca = hu->priv;
792
793 BT_DBG("hu %p want to sleep in %d state", hu, qca->rx_ibs_state);
794
795 spin_lock_irqsave(&qca->hci_ibs_lock, flags);
796
797 qca->ibs_recv_slps++;
798
799 switch (qca->rx_ibs_state) {
800 case HCI_IBS_RX_AWAKE:
801 /* Update state */
802 qca->rx_ibs_state = HCI_IBS_RX_ASLEEP;
803 /* Vote off rx clock under workqueue */
804 queue_work(qca->workqueue, &qca->ws_rx_vote_off);
805 break;
806
807 case HCI_IBS_RX_ASLEEP:
808 break;
809
810 default:
811 /* Any other state is illegal */
812 BT_ERR("Received HCI_IBS_SLEEP_IND in rx state %d",
813 qca->rx_ibs_state);
814 break;
815 }
816
817 wake_up_interruptible(&qca->suspend_wait_q);
818
819 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
820 }
821
822 /* Called upon wake-up-acknowledgement from the device
823 */
device_woke_up(struct hci_uart * hu)824 static void device_woke_up(struct hci_uart *hu)
825 {
826 unsigned long flags, idle_delay;
827 struct qca_data *qca = hu->priv;
828 struct sk_buff *skb = NULL;
829
830 BT_DBG("hu %p woke up", hu);
831
832 spin_lock_irqsave(&qca->hci_ibs_lock, flags);
833
834 qca->ibs_recv_wacks++;
835
836 /* Don't react to the wake-up-acknowledgment when suspending. */
837 if (test_bit(QCA_SUSPENDING, &qca->flags)) {
838 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
839 return;
840 }
841
842 switch (qca->tx_ibs_state) {
843 case HCI_IBS_TX_AWAKE:
844 /* Expect one if we send 2 WAKEs */
845 BT_DBG("Received HCI_IBS_WAKE_ACK in tx state %d",
846 qca->tx_ibs_state);
847 break;
848
849 case HCI_IBS_TX_WAKING:
850 /* Send pending packets */
851 while ((skb = skb_dequeue(&qca->tx_wait_q)))
852 skb_queue_tail(&qca->txq, skb);
853
854 /* Switch timers and change state to HCI_IBS_TX_AWAKE */
855 del_timer(&qca->wake_retrans_timer);
856 idle_delay = msecs_to_jiffies(qca->tx_idle_delay);
857 mod_timer(&qca->tx_idle_timer, jiffies + idle_delay);
858 qca->tx_ibs_state = HCI_IBS_TX_AWAKE;
859 break;
860
861 case HCI_IBS_TX_ASLEEP:
862 default:
863 BT_ERR("Received HCI_IBS_WAKE_ACK in tx state %d",
864 qca->tx_ibs_state);
865 break;
866 }
867
868 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
869
870 /* Actually send the packets */
871 hci_uart_tx_wakeup(hu);
872 }
873
874 /* Enqueue frame for transmittion (padding, crc, etc) may be called from
875 * two simultaneous tasklets.
876 */
qca_enqueue(struct hci_uart * hu,struct sk_buff * skb)877 static int qca_enqueue(struct hci_uart *hu, struct sk_buff *skb)
878 {
879 unsigned long flags = 0, idle_delay;
880 struct qca_data *qca = hu->priv;
881
882 BT_DBG("hu %p qca enq skb %p tx_ibs_state %d", hu, skb,
883 qca->tx_ibs_state);
884
885 if (test_bit(QCA_SSR_TRIGGERED, &qca->flags)) {
886 /* As SSR is in progress, ignore the packets */
887 bt_dev_dbg(hu->hdev, "SSR is in progress");
888 kfree_skb(skb);
889 return 0;
890 }
891
892 /* Prepend skb with frame type */
893 memcpy(skb_push(skb, 1), &hci_skb_pkt_type(skb), 1);
894
895 spin_lock_irqsave(&qca->hci_ibs_lock, flags);
896
897 /* Don't go to sleep in middle of patch download or
898 * Out-Of-Band(GPIOs control) sleep is selected.
899 * Don't wake the device up when suspending.
900 */
901 if (test_bit(QCA_IBS_DISABLED, &qca->flags) ||
902 test_bit(QCA_SUSPENDING, &qca->flags)) {
903 skb_queue_tail(&qca->txq, skb);
904 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
905 return 0;
906 }
907
908 /* Act according to current state */
909 switch (qca->tx_ibs_state) {
910 case HCI_IBS_TX_AWAKE:
911 BT_DBG("Device awake, sending normally");
912 skb_queue_tail(&qca->txq, skb);
913 idle_delay = msecs_to_jiffies(qca->tx_idle_delay);
914 mod_timer(&qca->tx_idle_timer, jiffies + idle_delay);
915 break;
916
917 case HCI_IBS_TX_ASLEEP:
918 BT_DBG("Device asleep, waking up and queueing packet");
919 /* Save packet for later */
920 skb_queue_tail(&qca->tx_wait_q, skb);
921
922 qca->tx_ibs_state = HCI_IBS_TX_WAKING;
923 /* Schedule a work queue to wake up device */
924 queue_work(qca->workqueue, &qca->ws_awake_device);
925 break;
926
927 case HCI_IBS_TX_WAKING:
928 BT_DBG("Device waking up, queueing packet");
929 /* Transient state; just keep packet for later */
930 skb_queue_tail(&qca->tx_wait_q, skb);
931 break;
932
933 default:
934 BT_ERR("Illegal tx state: %d (losing packet)",
935 qca->tx_ibs_state);
936 dev_kfree_skb_irq(skb);
937 break;
938 }
939
940 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
941
942 return 0;
943 }
944
qca_ibs_sleep_ind(struct hci_dev * hdev,struct sk_buff * skb)945 static int qca_ibs_sleep_ind(struct hci_dev *hdev, struct sk_buff *skb)
946 {
947 struct hci_uart *hu = hci_get_drvdata(hdev);
948
949 BT_DBG("hu %p recv hci ibs cmd 0x%x", hu, HCI_IBS_SLEEP_IND);
950
951 device_want_to_sleep(hu);
952
953 kfree_skb(skb);
954 return 0;
955 }
956
qca_ibs_wake_ind(struct hci_dev * hdev,struct sk_buff * skb)957 static int qca_ibs_wake_ind(struct hci_dev *hdev, struct sk_buff *skb)
958 {
959 struct hci_uart *hu = hci_get_drvdata(hdev);
960
961 BT_DBG("hu %p recv hci ibs cmd 0x%x", hu, HCI_IBS_WAKE_IND);
962
963 device_want_to_wakeup(hu);
964
965 kfree_skb(skb);
966 return 0;
967 }
968
qca_ibs_wake_ack(struct hci_dev * hdev,struct sk_buff * skb)969 static int qca_ibs_wake_ack(struct hci_dev *hdev, struct sk_buff *skb)
970 {
971 struct hci_uart *hu = hci_get_drvdata(hdev);
972
973 BT_DBG("hu %p recv hci ibs cmd 0x%x", hu, HCI_IBS_WAKE_ACK);
974
975 device_woke_up(hu);
976
977 kfree_skb(skb);
978 return 0;
979 }
980
qca_recv_acl_data(struct hci_dev * hdev,struct sk_buff * skb)981 static int qca_recv_acl_data(struct hci_dev *hdev, struct sk_buff *skb)
982 {
983 /* We receive debug logs from chip as an ACL packets.
984 * Instead of sending the data to ACL to decode the
985 * received data, we are pushing them to the above layers
986 * as a diagnostic packet.
987 */
988 if (get_unaligned_le16(skb->data) == QCA_DEBUG_HANDLE)
989 return hci_recv_diag(hdev, skb);
990
991 return hci_recv_frame(hdev, skb);
992 }
993
qca_dmp_hdr(struct hci_dev * hdev,struct sk_buff * skb)994 static void qca_dmp_hdr(struct hci_dev *hdev, struct sk_buff *skb)
995 {
996 struct hci_uart *hu = hci_get_drvdata(hdev);
997 struct qca_data *qca = hu->priv;
998 char buf[80];
999
1000 snprintf(buf, sizeof(buf), "Controller Name: 0x%x\n",
1001 qca->controller_id);
1002 skb_put_data(skb, buf, strlen(buf));
1003
1004 snprintf(buf, sizeof(buf), "Firmware Version: 0x%x\n",
1005 qca->fw_version);
1006 skb_put_data(skb, buf, strlen(buf));
1007
1008 snprintf(buf, sizeof(buf), "Vendor:Qualcomm\n");
1009 skb_put_data(skb, buf, strlen(buf));
1010
1011 snprintf(buf, sizeof(buf), "Driver: %s\n",
1012 hu->serdev->dev.driver->name);
1013 skb_put_data(skb, buf, strlen(buf));
1014 }
1015
qca_controller_memdump(struct work_struct * work)1016 static void qca_controller_memdump(struct work_struct *work)
1017 {
1018 struct qca_data *qca = container_of(work, struct qca_data,
1019 ctrl_memdump_evt);
1020 struct hci_uart *hu = qca->hu;
1021 struct sk_buff *skb;
1022 struct qca_memdump_event_hdr *cmd_hdr;
1023 struct qca_memdump_info *qca_memdump = qca->qca_memdump;
1024 struct qca_dump_size *dump;
1025 u16 seq_no;
1026 u32 rx_size;
1027 int ret = 0;
1028 enum qca_btsoc_type soc_type = qca_soc_type(hu);
1029
1030 while ((skb = skb_dequeue(&qca->rx_memdump_q))) {
1031
1032 mutex_lock(&qca->hci_memdump_lock);
1033 /* Skip processing the received packets if timeout detected
1034 * or memdump collection completed.
1035 */
1036 if (qca->memdump_state == QCA_MEMDUMP_TIMEOUT ||
1037 qca->memdump_state == QCA_MEMDUMP_COLLECTED) {
1038 mutex_unlock(&qca->hci_memdump_lock);
1039 return;
1040 }
1041
1042 if (!qca_memdump) {
1043 qca_memdump = kzalloc(sizeof(struct qca_memdump_info),
1044 GFP_ATOMIC);
1045 if (!qca_memdump) {
1046 mutex_unlock(&qca->hci_memdump_lock);
1047 return;
1048 }
1049
1050 qca->qca_memdump = qca_memdump;
1051 }
1052
1053 qca->memdump_state = QCA_MEMDUMP_COLLECTING;
1054 cmd_hdr = (void *) skb->data;
1055 seq_no = __le16_to_cpu(cmd_hdr->seq_no);
1056 skb_pull(skb, sizeof(struct qca_memdump_event_hdr));
1057
1058 if (!seq_no) {
1059
1060 /* This is the first frame of memdump packet from
1061 * the controller, Disable IBS to recevie dump
1062 * with out any interruption, ideally time required for
1063 * the controller to send the dump is 8 seconds. let us
1064 * start timer to handle this asynchronous activity.
1065 */
1066 set_bit(QCA_IBS_DISABLED, &qca->flags);
1067 set_bit(QCA_MEMDUMP_COLLECTION, &qca->flags);
1068 dump = (void *) skb->data;
1069 qca_memdump->ram_dump_size = __le32_to_cpu(dump->dump_size);
1070 if (!(qca_memdump->ram_dump_size)) {
1071 bt_dev_err(hu->hdev, "Rx invalid memdump size");
1072 kfree(qca_memdump);
1073 kfree_skb(skb);
1074 mutex_unlock(&qca->hci_memdump_lock);
1075 return;
1076 }
1077
1078 queue_delayed_work(qca->workqueue,
1079 &qca->ctrl_memdump_timeout,
1080 msecs_to_jiffies(MEMDUMP_TIMEOUT_MS));
1081 skb_pull(skb, sizeof(qca_memdump->ram_dump_size));
1082 qca_memdump->current_seq_no = 0;
1083 qca_memdump->received_dump = 0;
1084 ret = hci_devcd_init(hu->hdev, qca_memdump->ram_dump_size);
1085 bt_dev_info(hu->hdev, "hci_devcd_init Return:%d",
1086 ret);
1087 if (ret < 0) {
1088 kfree(qca->qca_memdump);
1089 qca->qca_memdump = NULL;
1090 qca->memdump_state = QCA_MEMDUMP_COLLECTED;
1091 cancel_delayed_work(&qca->ctrl_memdump_timeout);
1092 clear_bit(QCA_MEMDUMP_COLLECTION, &qca->flags);
1093 clear_bit(QCA_IBS_DISABLED, &qca->flags);
1094 mutex_unlock(&qca->hci_memdump_lock);
1095 return;
1096 }
1097
1098 bt_dev_info(hu->hdev, "QCA collecting dump of size:%u",
1099 qca_memdump->ram_dump_size);
1100
1101 }
1102
1103 /* If sequence no 0 is missed then there is no point in
1104 * accepting the other sequences.
1105 */
1106 if (!test_bit(QCA_MEMDUMP_COLLECTION, &qca->flags)) {
1107 bt_dev_err(hu->hdev, "QCA: Discarding other packets");
1108 kfree(qca_memdump);
1109 kfree_skb(skb);
1110 mutex_unlock(&qca->hci_memdump_lock);
1111 return;
1112 }
1113 /* There could be chance of missing some packets from
1114 * the controller. In such cases let us store the dummy
1115 * packets in the buffer.
1116 */
1117 /* For QCA6390, controller does not lost packets but
1118 * sequence number field of packet sometimes has error
1119 * bits, so skip this checking for missing packet.
1120 */
1121 while ((seq_no > qca_memdump->current_seq_no + 1) &&
1122 (soc_type != QCA_QCA6390) &&
1123 seq_no != QCA_LAST_SEQUENCE_NUM) {
1124 bt_dev_err(hu->hdev, "QCA controller missed packet:%d",
1125 qca_memdump->current_seq_no);
1126 rx_size = qca_memdump->received_dump;
1127 rx_size += QCA_DUMP_PACKET_SIZE;
1128 if (rx_size > qca_memdump->ram_dump_size) {
1129 bt_dev_err(hu->hdev,
1130 "QCA memdump received %d, no space for missed packet",
1131 qca_memdump->received_dump);
1132 break;
1133 }
1134 hci_devcd_append_pattern(hu->hdev, 0x00,
1135 QCA_DUMP_PACKET_SIZE);
1136 qca_memdump->received_dump += QCA_DUMP_PACKET_SIZE;
1137 qca_memdump->current_seq_no++;
1138 }
1139
1140 rx_size = qca_memdump->received_dump + skb->len;
1141 if (rx_size <= qca_memdump->ram_dump_size) {
1142 if ((seq_no != QCA_LAST_SEQUENCE_NUM) &&
1143 (seq_no != qca_memdump->current_seq_no)) {
1144 bt_dev_err(hu->hdev,
1145 "QCA memdump unexpected packet %d",
1146 seq_no);
1147 }
1148 bt_dev_dbg(hu->hdev,
1149 "QCA memdump packet %d with length %d",
1150 seq_no, skb->len);
1151 hci_devcd_append(hu->hdev, skb);
1152 qca_memdump->current_seq_no += 1;
1153 qca_memdump->received_dump = rx_size;
1154 } else {
1155 bt_dev_err(hu->hdev,
1156 "QCA memdump received no space for packet %d",
1157 qca_memdump->current_seq_no);
1158 }
1159
1160 if (seq_no == QCA_LAST_SEQUENCE_NUM) {
1161 bt_dev_info(hu->hdev,
1162 "QCA memdump Done, received %d, total %d",
1163 qca_memdump->received_dump,
1164 qca_memdump->ram_dump_size);
1165 hci_devcd_complete(hu->hdev);
1166 cancel_delayed_work(&qca->ctrl_memdump_timeout);
1167 kfree(qca->qca_memdump);
1168 qca->qca_memdump = NULL;
1169 qca->memdump_state = QCA_MEMDUMP_COLLECTED;
1170 clear_bit(QCA_MEMDUMP_COLLECTION, &qca->flags);
1171 }
1172
1173 mutex_unlock(&qca->hci_memdump_lock);
1174 }
1175
1176 }
1177
qca_controller_memdump_event(struct hci_dev * hdev,struct sk_buff * skb)1178 static int qca_controller_memdump_event(struct hci_dev *hdev,
1179 struct sk_buff *skb)
1180 {
1181 struct hci_uart *hu = hci_get_drvdata(hdev);
1182 struct qca_data *qca = hu->priv;
1183
1184 set_bit(QCA_SSR_TRIGGERED, &qca->flags);
1185 skb_queue_tail(&qca->rx_memdump_q, skb);
1186 queue_work(qca->workqueue, &qca->ctrl_memdump_evt);
1187
1188 return 0;
1189 }
1190
qca_recv_event(struct hci_dev * hdev,struct sk_buff * skb)1191 static int qca_recv_event(struct hci_dev *hdev, struct sk_buff *skb)
1192 {
1193 struct hci_uart *hu = hci_get_drvdata(hdev);
1194 struct qca_data *qca = hu->priv;
1195
1196 if (test_bit(QCA_DROP_VENDOR_EVENT, &qca->flags)) {
1197 struct hci_event_hdr *hdr = (void *)skb->data;
1198
1199 /* For the WCN3990 the vendor command for a baudrate change
1200 * isn't sent as synchronous HCI command, because the
1201 * controller sends the corresponding vendor event with the
1202 * new baudrate. The event is received and properly decoded
1203 * after changing the baudrate of the host port. It needs to
1204 * be dropped, otherwise it can be misinterpreted as
1205 * response to a later firmware download command (also a
1206 * vendor command).
1207 */
1208
1209 if (hdr->evt == HCI_EV_VENDOR)
1210 complete(&qca->drop_ev_comp);
1211
1212 kfree_skb(skb);
1213
1214 return 0;
1215 }
1216 /* We receive chip memory dump as an event packet, With a dedicated
1217 * handler followed by a hardware error event. When this event is
1218 * received we store dump into a file before closing hci. This
1219 * dump will help in triaging the issues.
1220 */
1221 if ((skb->data[0] == HCI_VENDOR_PKT) &&
1222 (get_unaligned_be16(skb->data + 2) == QCA_SSR_DUMP_HANDLE))
1223 return qca_controller_memdump_event(hdev, skb);
1224
1225 return hci_recv_frame(hdev, skb);
1226 }
1227
1228 #define QCA_IBS_SLEEP_IND_EVENT \
1229 .type = HCI_IBS_SLEEP_IND, \
1230 .hlen = 0, \
1231 .loff = 0, \
1232 .lsize = 0, \
1233 .maxlen = HCI_MAX_IBS_SIZE
1234
1235 #define QCA_IBS_WAKE_IND_EVENT \
1236 .type = HCI_IBS_WAKE_IND, \
1237 .hlen = 0, \
1238 .loff = 0, \
1239 .lsize = 0, \
1240 .maxlen = HCI_MAX_IBS_SIZE
1241
1242 #define QCA_IBS_WAKE_ACK_EVENT \
1243 .type = HCI_IBS_WAKE_ACK, \
1244 .hlen = 0, \
1245 .loff = 0, \
1246 .lsize = 0, \
1247 .maxlen = HCI_MAX_IBS_SIZE
1248
1249 static const struct h4_recv_pkt qca_recv_pkts[] = {
1250 { H4_RECV_ACL, .recv = qca_recv_acl_data },
1251 { H4_RECV_SCO, .recv = hci_recv_frame },
1252 { H4_RECV_EVENT, .recv = qca_recv_event },
1253 { QCA_IBS_WAKE_IND_EVENT, .recv = qca_ibs_wake_ind },
1254 { QCA_IBS_WAKE_ACK_EVENT, .recv = qca_ibs_wake_ack },
1255 { QCA_IBS_SLEEP_IND_EVENT, .recv = qca_ibs_sleep_ind },
1256 };
1257
qca_recv(struct hci_uart * hu,const void * data,int count)1258 static int qca_recv(struct hci_uart *hu, const void *data, int count)
1259 {
1260 struct qca_data *qca = hu->priv;
1261
1262 if (!test_bit(HCI_UART_REGISTERED, &hu->flags))
1263 return -EUNATCH;
1264
1265 qca->rx_skb = h4_recv_buf(hu->hdev, qca->rx_skb, data, count,
1266 qca_recv_pkts, ARRAY_SIZE(qca_recv_pkts));
1267 if (IS_ERR(qca->rx_skb)) {
1268 int err = PTR_ERR(qca->rx_skb);
1269 bt_dev_err(hu->hdev, "Frame reassembly failed (%d)", err);
1270 qca->rx_skb = NULL;
1271 return err;
1272 }
1273
1274 return count;
1275 }
1276
qca_dequeue(struct hci_uart * hu)1277 static struct sk_buff *qca_dequeue(struct hci_uart *hu)
1278 {
1279 struct qca_data *qca = hu->priv;
1280
1281 return skb_dequeue(&qca->txq);
1282 }
1283
qca_get_baudrate_value(int speed)1284 static uint8_t qca_get_baudrate_value(int speed)
1285 {
1286 switch (speed) {
1287 case 9600:
1288 return QCA_BAUDRATE_9600;
1289 case 19200:
1290 return QCA_BAUDRATE_19200;
1291 case 38400:
1292 return QCA_BAUDRATE_38400;
1293 case 57600:
1294 return QCA_BAUDRATE_57600;
1295 case 115200:
1296 return QCA_BAUDRATE_115200;
1297 case 230400:
1298 return QCA_BAUDRATE_230400;
1299 case 460800:
1300 return QCA_BAUDRATE_460800;
1301 case 500000:
1302 return QCA_BAUDRATE_500000;
1303 case 921600:
1304 return QCA_BAUDRATE_921600;
1305 case 1000000:
1306 return QCA_BAUDRATE_1000000;
1307 case 2000000:
1308 return QCA_BAUDRATE_2000000;
1309 case 3000000:
1310 return QCA_BAUDRATE_3000000;
1311 case 3200000:
1312 return QCA_BAUDRATE_3200000;
1313 case 3500000:
1314 return QCA_BAUDRATE_3500000;
1315 default:
1316 return QCA_BAUDRATE_115200;
1317 }
1318 }
1319
qca_set_baudrate(struct hci_dev * hdev,uint8_t baudrate)1320 static int qca_set_baudrate(struct hci_dev *hdev, uint8_t baudrate)
1321 {
1322 struct hci_uart *hu = hci_get_drvdata(hdev);
1323 struct qca_data *qca = hu->priv;
1324 struct sk_buff *skb;
1325 u8 cmd[] = { 0x01, 0x48, 0xFC, 0x01, 0x00 };
1326
1327 if (baudrate > QCA_BAUDRATE_3200000)
1328 return -EINVAL;
1329
1330 cmd[4] = baudrate;
1331
1332 skb = bt_skb_alloc(sizeof(cmd), GFP_KERNEL);
1333 if (!skb) {
1334 bt_dev_err(hdev, "Failed to allocate baudrate packet");
1335 return -ENOMEM;
1336 }
1337
1338 /* Assign commands to change baudrate and packet type. */
1339 skb_put_data(skb, cmd, sizeof(cmd));
1340 hci_skb_pkt_type(skb) = HCI_COMMAND_PKT;
1341
1342 skb_queue_tail(&qca->txq, skb);
1343 hci_uart_tx_wakeup(hu);
1344
1345 /* Wait for the baudrate change request to be sent */
1346
1347 while (!skb_queue_empty(&qca->txq))
1348 usleep_range(100, 200);
1349
1350 if (hu->serdev)
1351 serdev_device_wait_until_sent(hu->serdev,
1352 msecs_to_jiffies(CMD_TRANS_TIMEOUT_MS));
1353
1354 /* Give the controller time to process the request */
1355 switch (qca_soc_type(hu)) {
1356 case QCA_WCN3988:
1357 case QCA_WCN3990:
1358 case QCA_WCN3991:
1359 case QCA_WCN3998:
1360 case QCA_WCN6750:
1361 case QCA_WCN6855:
1362 case QCA_WCN7850:
1363 usleep_range(1000, 10000);
1364 break;
1365
1366 default:
1367 msleep(300);
1368 }
1369
1370 return 0;
1371 }
1372
host_set_baudrate(struct hci_uart * hu,unsigned int speed)1373 static inline void host_set_baudrate(struct hci_uart *hu, unsigned int speed)
1374 {
1375 if (hu->serdev)
1376 serdev_device_set_baudrate(hu->serdev, speed);
1377 else
1378 hci_uart_set_baudrate(hu, speed);
1379 }
1380
qca_send_power_pulse(struct hci_uart * hu,bool on)1381 static int qca_send_power_pulse(struct hci_uart *hu, bool on)
1382 {
1383 int ret;
1384 int timeout = msecs_to_jiffies(CMD_TRANS_TIMEOUT_MS);
1385 u8 cmd = on ? QCA_WCN3990_POWERON_PULSE : QCA_WCN3990_POWEROFF_PULSE;
1386
1387 /* These power pulses are single byte command which are sent
1388 * at required baudrate to wcn3990. On wcn3990, we have an external
1389 * circuit at Tx pin which decodes the pulse sent at specific baudrate.
1390 * For example, wcn3990 supports RF COEX antenna for both Wi-Fi/BT
1391 * and also we use the same power inputs to turn on and off for
1392 * Wi-Fi/BT. Powering up the power sources will not enable BT, until
1393 * we send a power on pulse at 115200 bps. This algorithm will help to
1394 * save power. Disabling hardware flow control is mandatory while
1395 * sending power pulses to SoC.
1396 */
1397 bt_dev_dbg(hu->hdev, "sending power pulse %02x to controller", cmd);
1398
1399 serdev_device_write_flush(hu->serdev);
1400 hci_uart_set_flow_control(hu, true);
1401 ret = serdev_device_write_buf(hu->serdev, &cmd, sizeof(cmd));
1402 if (ret < 0) {
1403 bt_dev_err(hu->hdev, "failed to send power pulse %02x", cmd);
1404 return ret;
1405 }
1406
1407 serdev_device_wait_until_sent(hu->serdev, timeout);
1408 hci_uart_set_flow_control(hu, false);
1409
1410 /* Give to controller time to boot/shutdown */
1411 if (on)
1412 msleep(100);
1413 else
1414 usleep_range(1000, 10000);
1415
1416 return 0;
1417 }
1418
qca_get_speed(struct hci_uart * hu,enum qca_speed_type speed_type)1419 static unsigned int qca_get_speed(struct hci_uart *hu,
1420 enum qca_speed_type speed_type)
1421 {
1422 unsigned int speed = 0;
1423
1424 if (speed_type == QCA_INIT_SPEED) {
1425 if (hu->init_speed)
1426 speed = hu->init_speed;
1427 else if (hu->proto->init_speed)
1428 speed = hu->proto->init_speed;
1429 } else {
1430 if (hu->oper_speed)
1431 speed = hu->oper_speed;
1432 else if (hu->proto->oper_speed)
1433 speed = hu->proto->oper_speed;
1434 }
1435
1436 return speed;
1437 }
1438
qca_check_speeds(struct hci_uart * hu)1439 static int qca_check_speeds(struct hci_uart *hu)
1440 {
1441 switch (qca_soc_type(hu)) {
1442 case QCA_WCN3988:
1443 case QCA_WCN3990:
1444 case QCA_WCN3991:
1445 case QCA_WCN3998:
1446 case QCA_WCN6750:
1447 case QCA_WCN6855:
1448 case QCA_WCN7850:
1449 if (!qca_get_speed(hu, QCA_INIT_SPEED) &&
1450 !qca_get_speed(hu, QCA_OPER_SPEED))
1451 return -EINVAL;
1452 break;
1453
1454 default:
1455 if (!qca_get_speed(hu, QCA_INIT_SPEED) ||
1456 !qca_get_speed(hu, QCA_OPER_SPEED))
1457 return -EINVAL;
1458 }
1459
1460 return 0;
1461 }
1462
qca_set_speed(struct hci_uart * hu,enum qca_speed_type speed_type)1463 static int qca_set_speed(struct hci_uart *hu, enum qca_speed_type speed_type)
1464 {
1465 unsigned int speed, qca_baudrate;
1466 struct qca_data *qca = hu->priv;
1467 int ret = 0;
1468
1469 if (speed_type == QCA_INIT_SPEED) {
1470 speed = qca_get_speed(hu, QCA_INIT_SPEED);
1471 if (speed)
1472 host_set_baudrate(hu, speed);
1473 } else {
1474 enum qca_btsoc_type soc_type = qca_soc_type(hu);
1475
1476 speed = qca_get_speed(hu, QCA_OPER_SPEED);
1477 if (!speed)
1478 return 0;
1479
1480 /* Disable flow control for wcn3990 to deassert RTS while
1481 * changing the baudrate of chip and host.
1482 */
1483 switch (soc_type) {
1484 case QCA_WCN3988:
1485 case QCA_WCN3990:
1486 case QCA_WCN3991:
1487 case QCA_WCN3998:
1488 case QCA_WCN6750:
1489 case QCA_WCN6855:
1490 case QCA_WCN7850:
1491 hci_uart_set_flow_control(hu, true);
1492 break;
1493
1494 default:
1495 break;
1496 }
1497
1498 switch (soc_type) {
1499 case QCA_WCN3990:
1500 reinit_completion(&qca->drop_ev_comp);
1501 set_bit(QCA_DROP_VENDOR_EVENT, &qca->flags);
1502 break;
1503
1504 default:
1505 break;
1506 }
1507
1508 qca_baudrate = qca_get_baudrate_value(speed);
1509 bt_dev_dbg(hu->hdev, "Set UART speed to %d", speed);
1510 ret = qca_set_baudrate(hu->hdev, qca_baudrate);
1511 if (ret)
1512 goto error;
1513
1514 host_set_baudrate(hu, speed);
1515
1516 error:
1517 switch (soc_type) {
1518 case QCA_WCN3988:
1519 case QCA_WCN3990:
1520 case QCA_WCN3991:
1521 case QCA_WCN3998:
1522 case QCA_WCN6750:
1523 case QCA_WCN6855:
1524 case QCA_WCN7850:
1525 hci_uart_set_flow_control(hu, false);
1526 break;
1527
1528 default:
1529 break;
1530 }
1531
1532 switch (soc_type) {
1533 case QCA_WCN3990:
1534 /* Wait for the controller to send the vendor event
1535 * for the baudrate change command.
1536 */
1537 if (!wait_for_completion_timeout(&qca->drop_ev_comp,
1538 msecs_to_jiffies(100))) {
1539 bt_dev_err(hu->hdev,
1540 "Failed to change controller baudrate\n");
1541 ret = -ETIMEDOUT;
1542 }
1543
1544 clear_bit(QCA_DROP_VENDOR_EVENT, &qca->flags);
1545 break;
1546
1547 default:
1548 break;
1549 }
1550 }
1551
1552 return ret;
1553 }
1554
qca_send_crashbuffer(struct hci_uart * hu)1555 static int qca_send_crashbuffer(struct hci_uart *hu)
1556 {
1557 struct qca_data *qca = hu->priv;
1558 struct sk_buff *skb;
1559
1560 skb = bt_skb_alloc(QCA_CRASHBYTE_PACKET_LEN, GFP_KERNEL);
1561 if (!skb) {
1562 bt_dev_err(hu->hdev, "Failed to allocate memory for skb packet");
1563 return -ENOMEM;
1564 }
1565
1566 /* We forcefully crash the controller, by sending 0xfb byte for
1567 * 1024 times. We also might have chance of losing data, To be
1568 * on safer side we send 1096 bytes to the SoC.
1569 */
1570 memset(skb_put(skb, QCA_CRASHBYTE_PACKET_LEN), QCA_MEMDUMP_BYTE,
1571 QCA_CRASHBYTE_PACKET_LEN);
1572 hci_skb_pkt_type(skb) = HCI_COMMAND_PKT;
1573 bt_dev_info(hu->hdev, "crash the soc to collect controller dump");
1574 skb_queue_tail(&qca->txq, skb);
1575 hci_uart_tx_wakeup(hu);
1576
1577 return 0;
1578 }
1579
qca_wait_for_dump_collection(struct hci_dev * hdev)1580 static void qca_wait_for_dump_collection(struct hci_dev *hdev)
1581 {
1582 struct hci_uart *hu = hci_get_drvdata(hdev);
1583 struct qca_data *qca = hu->priv;
1584
1585 wait_on_bit_timeout(&qca->flags, QCA_MEMDUMP_COLLECTION,
1586 TASK_UNINTERRUPTIBLE, MEMDUMP_TIMEOUT_MS);
1587
1588 clear_bit(QCA_MEMDUMP_COLLECTION, &qca->flags);
1589 }
1590
qca_hw_error(struct hci_dev * hdev,u8 code)1591 static void qca_hw_error(struct hci_dev *hdev, u8 code)
1592 {
1593 struct hci_uart *hu = hci_get_drvdata(hdev);
1594 struct qca_data *qca = hu->priv;
1595
1596 set_bit(QCA_SSR_TRIGGERED, &qca->flags);
1597 set_bit(QCA_HW_ERROR_EVENT, &qca->flags);
1598 bt_dev_info(hdev, "mem_dump_status: %d", qca->memdump_state);
1599
1600 if (qca->memdump_state == QCA_MEMDUMP_IDLE) {
1601 /* If hardware error event received for other than QCA
1602 * soc memory dump event, then we need to crash the SOC
1603 * and wait here for 8 seconds to get the dump packets.
1604 * This will block main thread to be on hold until we
1605 * collect dump.
1606 */
1607 set_bit(QCA_MEMDUMP_COLLECTION, &qca->flags);
1608 qca_send_crashbuffer(hu);
1609 qca_wait_for_dump_collection(hdev);
1610 } else if (qca->memdump_state == QCA_MEMDUMP_COLLECTING) {
1611 /* Let us wait here until memory dump collected or
1612 * memory dump timer expired.
1613 */
1614 bt_dev_info(hdev, "waiting for dump to complete");
1615 qca_wait_for_dump_collection(hdev);
1616 }
1617
1618 mutex_lock(&qca->hci_memdump_lock);
1619 if (qca->memdump_state != QCA_MEMDUMP_COLLECTED) {
1620 bt_dev_err(hu->hdev, "clearing allocated memory due to memdump timeout");
1621 hci_devcd_abort(hu->hdev);
1622 if (qca->qca_memdump) {
1623 kfree(qca->qca_memdump);
1624 qca->qca_memdump = NULL;
1625 }
1626 qca->memdump_state = QCA_MEMDUMP_TIMEOUT;
1627 cancel_delayed_work(&qca->ctrl_memdump_timeout);
1628 }
1629 mutex_unlock(&qca->hci_memdump_lock);
1630
1631 if (qca->memdump_state == QCA_MEMDUMP_TIMEOUT ||
1632 qca->memdump_state == QCA_MEMDUMP_COLLECTED) {
1633 cancel_work_sync(&qca->ctrl_memdump_evt);
1634 skb_queue_purge(&qca->rx_memdump_q);
1635 }
1636
1637 clear_bit(QCA_HW_ERROR_EVENT, &qca->flags);
1638 }
1639
qca_cmd_timeout(struct hci_dev * hdev)1640 static void qca_cmd_timeout(struct hci_dev *hdev)
1641 {
1642 struct hci_uart *hu = hci_get_drvdata(hdev);
1643 struct qca_data *qca = hu->priv;
1644
1645 set_bit(QCA_SSR_TRIGGERED, &qca->flags);
1646 if (qca->memdump_state == QCA_MEMDUMP_IDLE) {
1647 set_bit(QCA_MEMDUMP_COLLECTION, &qca->flags);
1648 qca_send_crashbuffer(hu);
1649 qca_wait_for_dump_collection(hdev);
1650 } else if (qca->memdump_state == QCA_MEMDUMP_COLLECTING) {
1651 /* Let us wait here until memory dump collected or
1652 * memory dump timer expired.
1653 */
1654 bt_dev_info(hdev, "waiting for dump to complete");
1655 qca_wait_for_dump_collection(hdev);
1656 }
1657
1658 mutex_lock(&qca->hci_memdump_lock);
1659 if (qca->memdump_state != QCA_MEMDUMP_COLLECTED) {
1660 qca->memdump_state = QCA_MEMDUMP_TIMEOUT;
1661 if (!test_bit(QCA_HW_ERROR_EVENT, &qca->flags)) {
1662 /* Inject hw error event to reset the device
1663 * and driver.
1664 */
1665 hci_reset_dev(hu->hdev);
1666 }
1667 }
1668 mutex_unlock(&qca->hci_memdump_lock);
1669 }
1670
qca_wakeup(struct hci_dev * hdev)1671 static bool qca_wakeup(struct hci_dev *hdev)
1672 {
1673 struct hci_uart *hu = hci_get_drvdata(hdev);
1674 bool wakeup;
1675
1676 if (!hu->serdev)
1677 return true;
1678
1679 /* BT SoC attached through the serial bus is handled by the serdev driver.
1680 * So we need to use the device handle of the serdev driver to get the
1681 * status of device may wakeup.
1682 */
1683 wakeup = device_may_wakeup(&hu->serdev->ctrl->dev);
1684 bt_dev_dbg(hu->hdev, "wakeup status : %d", wakeup);
1685
1686 return wakeup;
1687 }
1688
qca_regulator_init(struct hci_uart * hu)1689 static int qca_regulator_init(struct hci_uart *hu)
1690 {
1691 enum qca_btsoc_type soc_type = qca_soc_type(hu);
1692 struct qca_serdev *qcadev;
1693 int ret;
1694 bool sw_ctrl_state;
1695
1696 /* Check for vregs status, may be hci down has turned
1697 * off the voltage regulator.
1698 */
1699 qcadev = serdev_device_get_drvdata(hu->serdev);
1700 if (!qcadev->bt_power->vregs_on) {
1701 serdev_device_close(hu->serdev);
1702 ret = qca_regulator_enable(qcadev);
1703 if (ret)
1704 return ret;
1705
1706 ret = serdev_device_open(hu->serdev);
1707 if (ret) {
1708 bt_dev_err(hu->hdev, "failed to open port");
1709 return ret;
1710 }
1711 }
1712
1713 switch (soc_type) {
1714 case QCA_WCN3988:
1715 case QCA_WCN3990:
1716 case QCA_WCN3991:
1717 case QCA_WCN3998:
1718 /* Forcefully enable wcn399x to enter in to boot mode. */
1719 host_set_baudrate(hu, 2400);
1720 ret = qca_send_power_pulse(hu, false);
1721 if (ret)
1722 return ret;
1723 break;
1724
1725 default:
1726 break;
1727 }
1728
1729 /* For wcn6750 need to enable gpio bt_en */
1730 if (qcadev->bt_en) {
1731 gpiod_set_value_cansleep(qcadev->bt_en, 0);
1732 msleep(50);
1733 gpiod_set_value_cansleep(qcadev->bt_en, 1);
1734 msleep(50);
1735 if (qcadev->sw_ctrl) {
1736 sw_ctrl_state = gpiod_get_value_cansleep(qcadev->sw_ctrl);
1737 bt_dev_dbg(hu->hdev, "SW_CTRL is %d", sw_ctrl_state);
1738 }
1739 }
1740
1741 qca_set_speed(hu, QCA_INIT_SPEED);
1742
1743 switch (soc_type) {
1744 case QCA_WCN3988:
1745 case QCA_WCN3990:
1746 case QCA_WCN3991:
1747 case QCA_WCN3998:
1748 ret = qca_send_power_pulse(hu, true);
1749 if (ret)
1750 return ret;
1751 break;
1752
1753 default:
1754 break;
1755 }
1756
1757 /* Now the device is in ready state to communicate with host.
1758 * To sync host with device we need to reopen port.
1759 * Without this, we will have RTS and CTS synchronization
1760 * issues.
1761 */
1762 serdev_device_close(hu->serdev);
1763 ret = serdev_device_open(hu->serdev);
1764 if (ret) {
1765 bt_dev_err(hu->hdev, "failed to open port");
1766 return ret;
1767 }
1768
1769 hci_uart_set_flow_control(hu, false);
1770
1771 return 0;
1772 }
1773
qca_power_on(struct hci_dev * hdev)1774 static int qca_power_on(struct hci_dev *hdev)
1775 {
1776 struct hci_uart *hu = hci_get_drvdata(hdev);
1777 enum qca_btsoc_type soc_type = qca_soc_type(hu);
1778 struct qca_serdev *qcadev;
1779 struct qca_data *qca = hu->priv;
1780 int ret = 0;
1781
1782 /* Non-serdev device usually is powered by external power
1783 * and don't need additional action in driver for power on
1784 */
1785 if (!hu->serdev)
1786 return 0;
1787
1788 switch (soc_type) {
1789 case QCA_WCN3988:
1790 case QCA_WCN3990:
1791 case QCA_WCN3991:
1792 case QCA_WCN3998:
1793 case QCA_WCN6750:
1794 case QCA_WCN6855:
1795 case QCA_WCN7850:
1796 ret = qca_regulator_init(hu);
1797 break;
1798
1799 default:
1800 qcadev = serdev_device_get_drvdata(hu->serdev);
1801 if (qcadev->bt_en) {
1802 gpiod_set_value_cansleep(qcadev->bt_en, 1);
1803 /* Controller needs time to bootup. */
1804 msleep(150);
1805 }
1806 }
1807
1808 clear_bit(QCA_BT_OFF, &qca->flags);
1809 return ret;
1810 }
1811
hci_coredump_qca(struct hci_dev * hdev)1812 static void hci_coredump_qca(struct hci_dev *hdev)
1813 {
1814 int err;
1815 static const u8 param[] = { 0x26 };
1816
1817 err = __hci_cmd_send(hdev, 0xfc0c, 1, param);
1818 if (err < 0)
1819 bt_dev_err(hdev, "%s: trigger crash failed (%d)", __func__, err);
1820 }
1821
qca_setup(struct hci_uart * hu)1822 static int qca_setup(struct hci_uart *hu)
1823 {
1824 struct hci_dev *hdev = hu->hdev;
1825 struct qca_data *qca = hu->priv;
1826 unsigned int speed, qca_baudrate = QCA_BAUDRATE_115200;
1827 unsigned int retries = 0;
1828 enum qca_btsoc_type soc_type = qca_soc_type(hu);
1829 const char *firmware_name = qca_get_firmware_name(hu);
1830 int ret;
1831 struct qca_btsoc_version ver;
1832 struct qca_serdev *qcadev;
1833 const char *soc_name;
1834
1835 ret = qca_check_speeds(hu);
1836 if (ret)
1837 return ret;
1838
1839 clear_bit(QCA_ROM_FW, &qca->flags);
1840 /* Patch downloading has to be done without IBS mode */
1841 set_bit(QCA_IBS_DISABLED, &qca->flags);
1842
1843 /* Enable controller to do both LE scan and BR/EDR inquiry
1844 * simultaneously.
1845 */
1846 set_bit(HCI_QUIRK_SIMULTANEOUS_DISCOVERY, &hdev->quirks);
1847
1848 switch (soc_type) {
1849 case QCA_QCA2066:
1850 soc_name = "qca2066";
1851 break;
1852
1853 case QCA_WCN3988:
1854 case QCA_WCN3990:
1855 case QCA_WCN3991:
1856 case QCA_WCN3998:
1857 soc_name = "wcn399x";
1858 break;
1859
1860 case QCA_WCN6750:
1861 soc_name = "wcn6750";
1862 break;
1863
1864 case QCA_WCN6855:
1865 soc_name = "wcn6855";
1866 break;
1867
1868 case QCA_WCN7850:
1869 soc_name = "wcn7850";
1870 break;
1871
1872 default:
1873 soc_name = "ROME/QCA6390";
1874 }
1875 bt_dev_info(hdev, "setting up %s", soc_name);
1876
1877 qca->memdump_state = QCA_MEMDUMP_IDLE;
1878
1879 retry:
1880 ret = qca_power_on(hdev);
1881 if (ret)
1882 goto out;
1883
1884 clear_bit(QCA_SSR_TRIGGERED, &qca->flags);
1885
1886 switch (soc_type) {
1887 case QCA_WCN3988:
1888 case QCA_WCN3990:
1889 case QCA_WCN3991:
1890 case QCA_WCN3998:
1891 case QCA_WCN6750:
1892 case QCA_WCN6855:
1893 case QCA_WCN7850:
1894 qcadev = serdev_device_get_drvdata(hu->serdev);
1895 if (qcadev->bdaddr_property_broken)
1896 set_bit(HCI_QUIRK_BDADDR_PROPERTY_BROKEN, &hdev->quirks);
1897
1898 hci_set_aosp_capable(hdev);
1899
1900 ret = qca_read_soc_version(hdev, &ver, soc_type);
1901 if (ret)
1902 goto out;
1903 break;
1904
1905 default:
1906 qca_set_speed(hu, QCA_INIT_SPEED);
1907 }
1908
1909 /* Setup user speed if needed */
1910 speed = qca_get_speed(hu, QCA_OPER_SPEED);
1911 if (speed) {
1912 ret = qca_set_speed(hu, QCA_OPER_SPEED);
1913 if (ret)
1914 goto out;
1915
1916 qca_baudrate = qca_get_baudrate_value(speed);
1917 }
1918
1919 switch (soc_type) {
1920 case QCA_WCN3988:
1921 case QCA_WCN3990:
1922 case QCA_WCN3991:
1923 case QCA_WCN3998:
1924 case QCA_WCN6750:
1925 case QCA_WCN6855:
1926 case QCA_WCN7850:
1927 break;
1928
1929 default:
1930 /* Get QCA version information */
1931 ret = qca_read_soc_version(hdev, &ver, soc_type);
1932 if (ret)
1933 goto out;
1934 }
1935
1936 /* Setup patch / NVM configurations */
1937 ret = qca_uart_setup(hdev, qca_baudrate, soc_type, ver,
1938 firmware_name);
1939 if (!ret) {
1940 clear_bit(QCA_IBS_DISABLED, &qca->flags);
1941 qca_debugfs_init(hdev);
1942 hu->hdev->hw_error = qca_hw_error;
1943 hu->hdev->cmd_timeout = qca_cmd_timeout;
1944 if (hu->serdev) {
1945 if (device_can_wakeup(hu->serdev->ctrl->dev.parent))
1946 hu->hdev->wakeup = qca_wakeup;
1947 }
1948 } else if (ret == -ENOENT) {
1949 /* No patch/nvm-config found, run with original fw/config */
1950 set_bit(QCA_ROM_FW, &qca->flags);
1951 ret = 0;
1952 } else if (ret == -EAGAIN) {
1953 /*
1954 * Userspace firmware loader will return -EAGAIN in case no
1955 * patch/nvm-config is found, so run with original fw/config.
1956 */
1957 set_bit(QCA_ROM_FW, &qca->flags);
1958 ret = 0;
1959 }
1960
1961 out:
1962 if (ret && retries < MAX_INIT_RETRIES) {
1963 bt_dev_warn(hdev, "Retry BT power ON:%d", retries);
1964 qca_power_shutdown(hu);
1965 if (hu->serdev) {
1966 serdev_device_close(hu->serdev);
1967 ret = serdev_device_open(hu->serdev);
1968 if (ret) {
1969 bt_dev_err(hdev, "failed to open port");
1970 return ret;
1971 }
1972 }
1973 retries++;
1974 goto retry;
1975 }
1976
1977 /* Setup bdaddr */
1978 if (soc_type == QCA_ROME)
1979 hu->hdev->set_bdaddr = qca_set_bdaddr_rome;
1980 else
1981 hu->hdev->set_bdaddr = qca_set_bdaddr;
1982 qca->fw_version = le16_to_cpu(ver.patch_ver);
1983 qca->controller_id = le16_to_cpu(ver.rom_ver);
1984 hci_devcd_register(hdev, hci_coredump_qca, qca_dmp_hdr, NULL);
1985
1986 return ret;
1987 }
1988
1989 static const struct hci_uart_proto qca_proto = {
1990 .id = HCI_UART_QCA,
1991 .name = "QCA",
1992 .manufacturer = 29,
1993 .init_speed = 115200,
1994 .oper_speed = 3000000,
1995 .open = qca_open,
1996 .close = qca_close,
1997 .flush = qca_flush,
1998 .setup = qca_setup,
1999 .recv = qca_recv,
2000 .enqueue = qca_enqueue,
2001 .dequeue = qca_dequeue,
2002 };
2003
2004 static const struct qca_device_data qca_soc_data_wcn3988 __maybe_unused = {
2005 .soc_type = QCA_WCN3988,
2006 .vregs = (struct qca_vreg []) {
2007 { "vddio", 15000 },
2008 { "vddxo", 80000 },
2009 { "vddrf", 300000 },
2010 { "vddch0", 450000 },
2011 },
2012 .num_vregs = 4,
2013 };
2014
2015 static const struct qca_device_data qca_soc_data_wcn3990 __maybe_unused = {
2016 .soc_type = QCA_WCN3990,
2017 .vregs = (struct qca_vreg []) {
2018 { "vddio", 15000 },
2019 { "vddxo", 80000 },
2020 { "vddrf", 300000 },
2021 { "vddch0", 450000 },
2022 },
2023 .num_vregs = 4,
2024 };
2025
2026 static const struct qca_device_data qca_soc_data_wcn3991 __maybe_unused = {
2027 .soc_type = QCA_WCN3991,
2028 .vregs = (struct qca_vreg []) {
2029 { "vddio", 15000 },
2030 { "vddxo", 80000 },
2031 { "vddrf", 300000 },
2032 { "vddch0", 450000 },
2033 },
2034 .num_vregs = 4,
2035 .capabilities = QCA_CAP_WIDEBAND_SPEECH | QCA_CAP_VALID_LE_STATES,
2036 };
2037
2038 static const struct qca_device_data qca_soc_data_wcn3998 __maybe_unused = {
2039 .soc_type = QCA_WCN3998,
2040 .vregs = (struct qca_vreg []) {
2041 { "vddio", 10000 },
2042 { "vddxo", 80000 },
2043 { "vddrf", 300000 },
2044 { "vddch0", 450000 },
2045 },
2046 .num_vregs = 4,
2047 };
2048
2049 static const struct qca_device_data qca_soc_data_qca2066 __maybe_unused = {
2050 .soc_type = QCA_QCA2066,
2051 .num_vregs = 0,
2052 };
2053
2054 static const struct qca_device_data qca_soc_data_qca6390 __maybe_unused = {
2055 .soc_type = QCA_QCA6390,
2056 .num_vregs = 0,
2057 .capabilities = QCA_CAP_WIDEBAND_SPEECH | QCA_CAP_VALID_LE_STATES,
2058 };
2059
2060 static const struct qca_device_data qca_soc_data_wcn6750 __maybe_unused = {
2061 .soc_type = QCA_WCN6750,
2062 .vregs = (struct qca_vreg []) {
2063 { "vddio", 5000 },
2064 { "vddaon", 26000 },
2065 { "vddbtcxmx", 126000 },
2066 { "vddrfacmn", 12500 },
2067 { "vddrfa0p8", 102000 },
2068 { "vddrfa1p7", 302000 },
2069 { "vddrfa1p2", 257000 },
2070 { "vddrfa2p2", 1700000 },
2071 { "vddasd", 200 },
2072 },
2073 .num_vregs = 9,
2074 .capabilities = QCA_CAP_WIDEBAND_SPEECH | QCA_CAP_VALID_LE_STATES,
2075 };
2076
2077 static const struct qca_device_data qca_soc_data_wcn6855 __maybe_unused = {
2078 .soc_type = QCA_WCN6855,
2079 .vregs = (struct qca_vreg []) {
2080 { "vddio", 5000 },
2081 { "vddbtcxmx", 126000 },
2082 { "vddrfacmn", 12500 },
2083 { "vddrfa0p8", 102000 },
2084 { "vddrfa1p7", 302000 },
2085 { "vddrfa1p2", 257000 },
2086 },
2087 .num_vregs = 6,
2088 .capabilities = QCA_CAP_WIDEBAND_SPEECH | QCA_CAP_VALID_LE_STATES,
2089 };
2090
2091 static const struct qca_device_data qca_soc_data_wcn7850 __maybe_unused = {
2092 .soc_type = QCA_WCN7850,
2093 .vregs = (struct qca_vreg []) {
2094 { "vddio", 5000 },
2095 { "vddaon", 26000 },
2096 { "vdddig", 126000 },
2097 { "vddrfa0p8", 102000 },
2098 { "vddrfa1p2", 257000 },
2099 { "vddrfa1p9", 302000 },
2100 },
2101 .num_vregs = 6,
2102 .capabilities = QCA_CAP_WIDEBAND_SPEECH | QCA_CAP_VALID_LE_STATES,
2103 };
2104
qca_power_shutdown(struct hci_uart * hu)2105 static void qca_power_shutdown(struct hci_uart *hu)
2106 {
2107 struct qca_serdev *qcadev;
2108 struct qca_data *qca = hu->priv;
2109 unsigned long flags;
2110 enum qca_btsoc_type soc_type = qca_soc_type(hu);
2111 bool sw_ctrl_state;
2112
2113 /* From this point we go into power off state. But serial port is
2114 * still open, stop queueing the IBS data and flush all the buffered
2115 * data in skb's.
2116 */
2117 spin_lock_irqsave(&qca->hci_ibs_lock, flags);
2118 set_bit(QCA_IBS_DISABLED, &qca->flags);
2119 qca_flush(hu);
2120 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
2121
2122 /* Non-serdev device usually is powered by external power
2123 * and don't need additional action in driver for power down
2124 */
2125 if (!hu->serdev)
2126 return;
2127
2128 qcadev = serdev_device_get_drvdata(hu->serdev);
2129
2130 switch (soc_type) {
2131 case QCA_WCN3988:
2132 case QCA_WCN3990:
2133 case QCA_WCN3991:
2134 case QCA_WCN3998:
2135 host_set_baudrate(hu, 2400);
2136 qca_send_power_pulse(hu, false);
2137 qca_regulator_disable(qcadev);
2138 break;
2139
2140 case QCA_WCN6750:
2141 case QCA_WCN6855:
2142 gpiod_set_value_cansleep(qcadev->bt_en, 0);
2143 msleep(100);
2144 qca_regulator_disable(qcadev);
2145 if (qcadev->sw_ctrl) {
2146 sw_ctrl_state = gpiod_get_value_cansleep(qcadev->sw_ctrl);
2147 bt_dev_dbg(hu->hdev, "SW_CTRL is %d", sw_ctrl_state);
2148 }
2149 break;
2150
2151 default:
2152 gpiod_set_value_cansleep(qcadev->bt_en, 0);
2153 }
2154
2155 set_bit(QCA_BT_OFF, &qca->flags);
2156 }
2157
qca_power_off(struct hci_dev * hdev)2158 static int qca_power_off(struct hci_dev *hdev)
2159 {
2160 struct hci_uart *hu = hci_get_drvdata(hdev);
2161 struct qca_data *qca = hu->priv;
2162 enum qca_btsoc_type soc_type = qca_soc_type(hu);
2163
2164 hu->hdev->hw_error = NULL;
2165 hu->hdev->cmd_timeout = NULL;
2166
2167 del_timer_sync(&qca->wake_retrans_timer);
2168 del_timer_sync(&qca->tx_idle_timer);
2169
2170 /* Stop sending shutdown command if soc crashes. */
2171 if (soc_type != QCA_ROME
2172 && qca->memdump_state == QCA_MEMDUMP_IDLE) {
2173 qca_send_pre_shutdown_cmd(hdev);
2174 usleep_range(8000, 10000);
2175 }
2176
2177 qca_power_shutdown(hu);
2178 return 0;
2179 }
2180
qca_regulator_enable(struct qca_serdev * qcadev)2181 static int qca_regulator_enable(struct qca_serdev *qcadev)
2182 {
2183 struct qca_power *power = qcadev->bt_power;
2184 int ret;
2185
2186 /* Already enabled */
2187 if (power->vregs_on)
2188 return 0;
2189
2190 BT_DBG("enabling %d regulators)", power->num_vregs);
2191
2192 ret = regulator_bulk_enable(power->num_vregs, power->vreg_bulk);
2193 if (ret)
2194 return ret;
2195
2196 power->vregs_on = true;
2197
2198 ret = clk_prepare_enable(qcadev->susclk);
2199 if (ret)
2200 qca_regulator_disable(qcadev);
2201
2202 return ret;
2203 }
2204
qca_regulator_disable(struct qca_serdev * qcadev)2205 static void qca_regulator_disable(struct qca_serdev *qcadev)
2206 {
2207 struct qca_power *power;
2208
2209 if (!qcadev)
2210 return;
2211
2212 power = qcadev->bt_power;
2213
2214 /* Already disabled? */
2215 if (!power->vregs_on)
2216 return;
2217
2218 regulator_bulk_disable(power->num_vregs, power->vreg_bulk);
2219 power->vregs_on = false;
2220
2221 clk_disable_unprepare(qcadev->susclk);
2222 }
2223
qca_init_regulators(struct qca_power * qca,const struct qca_vreg * vregs,size_t num_vregs)2224 static int qca_init_regulators(struct qca_power *qca,
2225 const struct qca_vreg *vregs, size_t num_vregs)
2226 {
2227 struct regulator_bulk_data *bulk;
2228 int ret;
2229 int i;
2230
2231 bulk = devm_kcalloc(qca->dev, num_vregs, sizeof(*bulk), GFP_KERNEL);
2232 if (!bulk)
2233 return -ENOMEM;
2234
2235 for (i = 0; i < num_vregs; i++)
2236 bulk[i].supply = vregs[i].name;
2237
2238 ret = devm_regulator_bulk_get(qca->dev, num_vregs, bulk);
2239 if (ret < 0)
2240 return ret;
2241
2242 for (i = 0; i < num_vregs; i++) {
2243 ret = regulator_set_load(bulk[i].consumer, vregs[i].load_uA);
2244 if (ret)
2245 return ret;
2246 }
2247
2248 qca->vreg_bulk = bulk;
2249 qca->num_vregs = num_vregs;
2250
2251 return 0;
2252 }
2253
qca_serdev_probe(struct serdev_device * serdev)2254 static int qca_serdev_probe(struct serdev_device *serdev)
2255 {
2256 struct qca_serdev *qcadev;
2257 struct hci_dev *hdev;
2258 const struct qca_device_data *data;
2259 int err;
2260 bool power_ctrl_enabled = true;
2261
2262 qcadev = devm_kzalloc(&serdev->dev, sizeof(*qcadev), GFP_KERNEL);
2263 if (!qcadev)
2264 return -ENOMEM;
2265
2266 qcadev->serdev_hu.serdev = serdev;
2267 data = device_get_match_data(&serdev->dev);
2268 serdev_device_set_drvdata(serdev, qcadev);
2269 device_property_read_string(&serdev->dev, "firmware-name",
2270 &qcadev->firmware_name);
2271 device_property_read_u32(&serdev->dev, "max-speed",
2272 &qcadev->oper_speed);
2273 if (!qcadev->oper_speed)
2274 BT_DBG("UART will pick default operating speed");
2275
2276 qcadev->bdaddr_property_broken = device_property_read_bool(&serdev->dev,
2277 "qcom,local-bd-address-broken");
2278
2279 if (data)
2280 qcadev->btsoc_type = data->soc_type;
2281 else
2282 qcadev->btsoc_type = QCA_ROME;
2283
2284 switch (qcadev->btsoc_type) {
2285 case QCA_WCN3988:
2286 case QCA_WCN3990:
2287 case QCA_WCN3991:
2288 case QCA_WCN3998:
2289 case QCA_WCN6750:
2290 case QCA_WCN6855:
2291 case QCA_WCN7850:
2292 qcadev->bt_power = devm_kzalloc(&serdev->dev,
2293 sizeof(struct qca_power),
2294 GFP_KERNEL);
2295 if (!qcadev->bt_power)
2296 return -ENOMEM;
2297
2298 qcadev->bt_power->dev = &serdev->dev;
2299 err = qca_init_regulators(qcadev->bt_power, data->vregs,
2300 data->num_vregs);
2301 if (err) {
2302 BT_ERR("Failed to init regulators:%d", err);
2303 return err;
2304 }
2305
2306 qcadev->bt_power->vregs_on = false;
2307
2308 qcadev->bt_en = devm_gpiod_get_optional(&serdev->dev, "enable",
2309 GPIOD_OUT_LOW);
2310 if (IS_ERR(qcadev->bt_en) &&
2311 (data->soc_type == QCA_WCN6750 ||
2312 data->soc_type == QCA_WCN6855)) {
2313 dev_err(&serdev->dev, "failed to acquire BT_EN gpio\n");
2314 return PTR_ERR(qcadev->bt_en);
2315 }
2316
2317 if (!qcadev->bt_en)
2318 power_ctrl_enabled = false;
2319
2320 qcadev->sw_ctrl = devm_gpiod_get_optional(&serdev->dev, "swctrl",
2321 GPIOD_IN);
2322 if (IS_ERR(qcadev->sw_ctrl) &&
2323 (data->soc_type == QCA_WCN6750 ||
2324 data->soc_type == QCA_WCN6855 ||
2325 data->soc_type == QCA_WCN7850)) {
2326 dev_err(&serdev->dev, "failed to acquire SW_CTRL gpio\n");
2327 return PTR_ERR(qcadev->sw_ctrl);
2328 }
2329
2330 qcadev->susclk = devm_clk_get_optional(&serdev->dev, NULL);
2331 if (IS_ERR(qcadev->susclk)) {
2332 dev_err(&serdev->dev, "failed to acquire clk\n");
2333 return PTR_ERR(qcadev->susclk);
2334 }
2335
2336 err = hci_uart_register_device(&qcadev->serdev_hu, &qca_proto);
2337 if (err) {
2338 BT_ERR("wcn3990 serdev registration failed");
2339 return err;
2340 }
2341 break;
2342
2343 default:
2344 qcadev->bt_en = devm_gpiod_get_optional(&serdev->dev, "enable",
2345 GPIOD_OUT_LOW);
2346 if (IS_ERR(qcadev->bt_en)) {
2347 dev_err(&serdev->dev, "failed to acquire enable gpio\n");
2348 return PTR_ERR(qcadev->bt_en);
2349 }
2350
2351 if (!qcadev->bt_en)
2352 power_ctrl_enabled = false;
2353
2354 qcadev->susclk = devm_clk_get_optional(&serdev->dev, NULL);
2355 if (IS_ERR(qcadev->susclk)) {
2356 dev_warn(&serdev->dev, "failed to acquire clk\n");
2357 return PTR_ERR(qcadev->susclk);
2358 }
2359 err = clk_set_rate(qcadev->susclk, SUSCLK_RATE_32KHZ);
2360 if (err)
2361 return err;
2362
2363 err = clk_prepare_enable(qcadev->susclk);
2364 if (err)
2365 return err;
2366
2367 err = hci_uart_register_device(&qcadev->serdev_hu, &qca_proto);
2368 if (err) {
2369 BT_ERR("Rome serdev registration failed");
2370 clk_disable_unprepare(qcadev->susclk);
2371 return err;
2372 }
2373 }
2374
2375 hdev = qcadev->serdev_hu.hdev;
2376
2377 if (power_ctrl_enabled) {
2378 set_bit(HCI_QUIRK_NON_PERSISTENT_SETUP, &hdev->quirks);
2379 hdev->shutdown = qca_power_off;
2380 }
2381
2382 if (data) {
2383 /* Wideband speech support must be set per driver since it can't
2384 * be queried via hci. Same with the valid le states quirk.
2385 */
2386 if (data->capabilities & QCA_CAP_WIDEBAND_SPEECH)
2387 set_bit(HCI_QUIRK_WIDEBAND_SPEECH_SUPPORTED,
2388 &hdev->quirks);
2389
2390 if (data->capabilities & QCA_CAP_VALID_LE_STATES)
2391 set_bit(HCI_QUIRK_VALID_LE_STATES, &hdev->quirks);
2392 }
2393
2394 return 0;
2395 }
2396
qca_serdev_remove(struct serdev_device * serdev)2397 static void qca_serdev_remove(struct serdev_device *serdev)
2398 {
2399 struct qca_serdev *qcadev = serdev_device_get_drvdata(serdev);
2400 struct qca_power *power = qcadev->bt_power;
2401
2402 switch (qcadev->btsoc_type) {
2403 case QCA_WCN3988:
2404 case QCA_WCN3990:
2405 case QCA_WCN3991:
2406 case QCA_WCN3998:
2407 case QCA_WCN6750:
2408 case QCA_WCN6855:
2409 case QCA_WCN7850:
2410 if (power->vregs_on) {
2411 qca_power_shutdown(&qcadev->serdev_hu);
2412 break;
2413 }
2414 fallthrough;
2415
2416 default:
2417 if (qcadev->susclk)
2418 clk_disable_unprepare(qcadev->susclk);
2419 }
2420
2421 hci_uart_unregister_device(&qcadev->serdev_hu);
2422 }
2423
qca_serdev_shutdown(struct device * dev)2424 static void qca_serdev_shutdown(struct device *dev)
2425 {
2426 int ret;
2427 int timeout = msecs_to_jiffies(CMD_TRANS_TIMEOUT_MS);
2428 struct serdev_device *serdev = to_serdev_device(dev);
2429 struct qca_serdev *qcadev = serdev_device_get_drvdata(serdev);
2430 struct hci_uart *hu = &qcadev->serdev_hu;
2431 struct hci_dev *hdev = hu->hdev;
2432 const u8 ibs_wake_cmd[] = { 0xFD };
2433 const u8 edl_reset_soc_cmd[] = { 0x01, 0x00, 0xFC, 0x01, 0x05 };
2434
2435 if (qcadev->btsoc_type == QCA_QCA6390) {
2436 /* The purpose of sending the VSC is to reset SOC into a initial
2437 * state and the state will ensure next hdev->setup() success.
2438 * if HCI_QUIRK_NON_PERSISTENT_SETUP is set, it means that
2439 * hdev->setup() can do its job regardless of SoC state, so
2440 * don't need to send the VSC.
2441 * if HCI_SETUP is set, it means that hdev->setup() was never
2442 * invoked and the SOC is already in the initial state, so
2443 * don't also need to send the VSC.
2444 */
2445 if (test_bit(HCI_QUIRK_NON_PERSISTENT_SETUP, &hdev->quirks) ||
2446 hci_dev_test_flag(hdev, HCI_SETUP))
2447 return;
2448
2449 /* The serdev must be in open state when conrol logic arrives
2450 * here, so also fix the use-after-free issue caused by that
2451 * the serdev is flushed or wrote after it is closed.
2452 */
2453 serdev_device_write_flush(serdev);
2454 ret = serdev_device_write_buf(serdev, ibs_wake_cmd,
2455 sizeof(ibs_wake_cmd));
2456 if (ret < 0) {
2457 BT_ERR("QCA send IBS_WAKE_IND error: %d", ret);
2458 return;
2459 }
2460 serdev_device_wait_until_sent(serdev, timeout);
2461 usleep_range(8000, 10000);
2462
2463 serdev_device_write_flush(serdev);
2464 ret = serdev_device_write_buf(serdev, edl_reset_soc_cmd,
2465 sizeof(edl_reset_soc_cmd));
2466 if (ret < 0) {
2467 BT_ERR("QCA send EDL_RESET_REQ error: %d", ret);
2468 return;
2469 }
2470 serdev_device_wait_until_sent(serdev, timeout);
2471 usleep_range(8000, 10000);
2472 }
2473 }
2474
qca_suspend(struct device * dev)2475 static int __maybe_unused qca_suspend(struct device *dev)
2476 {
2477 struct serdev_device *serdev = to_serdev_device(dev);
2478 struct qca_serdev *qcadev = serdev_device_get_drvdata(serdev);
2479 struct hci_uart *hu = &qcadev->serdev_hu;
2480 struct qca_data *qca = hu->priv;
2481 unsigned long flags;
2482 bool tx_pending = false;
2483 int ret = 0;
2484 u8 cmd;
2485 u32 wait_timeout = 0;
2486
2487 set_bit(QCA_SUSPENDING, &qca->flags);
2488
2489 /* if BT SoC is running with default firmware then it does not
2490 * support in-band sleep
2491 */
2492 if (test_bit(QCA_ROM_FW, &qca->flags))
2493 return 0;
2494
2495 /* During SSR after memory dump collection, controller will be
2496 * powered off and then powered on.If controller is powered off
2497 * during SSR then we should wait until SSR is completed.
2498 */
2499 if (test_bit(QCA_BT_OFF, &qca->flags) &&
2500 !test_bit(QCA_SSR_TRIGGERED, &qca->flags))
2501 return 0;
2502
2503 if (test_bit(QCA_IBS_DISABLED, &qca->flags) ||
2504 test_bit(QCA_SSR_TRIGGERED, &qca->flags)) {
2505 wait_timeout = test_bit(QCA_SSR_TRIGGERED, &qca->flags) ?
2506 IBS_DISABLE_SSR_TIMEOUT_MS :
2507 FW_DOWNLOAD_TIMEOUT_MS;
2508
2509 /* QCA_IBS_DISABLED flag is set to true, During FW download
2510 * and during memory dump collection. It is reset to false,
2511 * After FW download complete.
2512 */
2513 wait_on_bit_timeout(&qca->flags, QCA_IBS_DISABLED,
2514 TASK_UNINTERRUPTIBLE, msecs_to_jiffies(wait_timeout));
2515
2516 if (test_bit(QCA_IBS_DISABLED, &qca->flags)) {
2517 bt_dev_err(hu->hdev, "SSR or FW download time out");
2518 ret = -ETIMEDOUT;
2519 goto error;
2520 }
2521 }
2522
2523 cancel_work_sync(&qca->ws_awake_device);
2524 cancel_work_sync(&qca->ws_awake_rx);
2525
2526 spin_lock_irqsave_nested(&qca->hci_ibs_lock,
2527 flags, SINGLE_DEPTH_NESTING);
2528
2529 switch (qca->tx_ibs_state) {
2530 case HCI_IBS_TX_WAKING:
2531 del_timer(&qca->wake_retrans_timer);
2532 fallthrough;
2533 case HCI_IBS_TX_AWAKE:
2534 del_timer(&qca->tx_idle_timer);
2535
2536 serdev_device_write_flush(hu->serdev);
2537 cmd = HCI_IBS_SLEEP_IND;
2538 ret = serdev_device_write_buf(hu->serdev, &cmd, sizeof(cmd));
2539
2540 if (ret < 0) {
2541 BT_ERR("Failed to send SLEEP to device");
2542 break;
2543 }
2544
2545 qca->tx_ibs_state = HCI_IBS_TX_ASLEEP;
2546 qca->ibs_sent_slps++;
2547 tx_pending = true;
2548 break;
2549
2550 case HCI_IBS_TX_ASLEEP:
2551 break;
2552
2553 default:
2554 BT_ERR("Spurious tx state %d", qca->tx_ibs_state);
2555 ret = -EINVAL;
2556 break;
2557 }
2558
2559 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
2560
2561 if (ret < 0)
2562 goto error;
2563
2564 if (tx_pending) {
2565 serdev_device_wait_until_sent(hu->serdev,
2566 msecs_to_jiffies(CMD_TRANS_TIMEOUT_MS));
2567 serial_clock_vote(HCI_IBS_TX_VOTE_CLOCK_OFF, hu);
2568 }
2569
2570 /* Wait for HCI_IBS_SLEEP_IND sent by device to indicate its Tx is going
2571 * to sleep, so that the packet does not wake the system later.
2572 */
2573 ret = wait_event_interruptible_timeout(qca->suspend_wait_q,
2574 qca->rx_ibs_state == HCI_IBS_RX_ASLEEP,
2575 msecs_to_jiffies(IBS_BTSOC_TX_IDLE_TIMEOUT_MS));
2576 if (ret == 0) {
2577 ret = -ETIMEDOUT;
2578 goto error;
2579 }
2580
2581 return 0;
2582
2583 error:
2584 clear_bit(QCA_SUSPENDING, &qca->flags);
2585
2586 return ret;
2587 }
2588
qca_resume(struct device * dev)2589 static int __maybe_unused qca_resume(struct device *dev)
2590 {
2591 struct serdev_device *serdev = to_serdev_device(dev);
2592 struct qca_serdev *qcadev = serdev_device_get_drvdata(serdev);
2593 struct hci_uart *hu = &qcadev->serdev_hu;
2594 struct qca_data *qca = hu->priv;
2595
2596 clear_bit(QCA_SUSPENDING, &qca->flags);
2597
2598 return 0;
2599 }
2600
2601 static SIMPLE_DEV_PM_OPS(qca_pm_ops, qca_suspend, qca_resume);
2602
2603 #ifdef CONFIG_OF
2604 static const struct of_device_id qca_bluetooth_of_match[] = {
2605 { .compatible = "qcom,qca2066-bt", .data = &qca_soc_data_qca2066},
2606 { .compatible = "qcom,qca6174-bt" },
2607 { .compatible = "qcom,qca6390-bt", .data = &qca_soc_data_qca6390},
2608 { .compatible = "qcom,qca9377-bt" },
2609 { .compatible = "qcom,wcn3988-bt", .data = &qca_soc_data_wcn3988},
2610 { .compatible = "qcom,wcn3990-bt", .data = &qca_soc_data_wcn3990},
2611 { .compatible = "qcom,wcn3991-bt", .data = &qca_soc_data_wcn3991},
2612 { .compatible = "qcom,wcn3998-bt", .data = &qca_soc_data_wcn3998},
2613 { .compatible = "qcom,wcn6750-bt", .data = &qca_soc_data_wcn6750},
2614 { .compatible = "qcom,wcn6855-bt", .data = &qca_soc_data_wcn6855},
2615 { .compatible = "qcom,wcn7850-bt", .data = &qca_soc_data_wcn7850},
2616 { /* sentinel */ }
2617 };
2618 MODULE_DEVICE_TABLE(of, qca_bluetooth_of_match);
2619 #endif
2620
2621 #ifdef CONFIG_ACPI
2622 static const struct acpi_device_id qca_bluetooth_acpi_match[] = {
2623 { "QCOM2066", (kernel_ulong_t)&qca_soc_data_qca2066 },
2624 { "QCOM6390", (kernel_ulong_t)&qca_soc_data_qca6390 },
2625 { "DLA16390", (kernel_ulong_t)&qca_soc_data_qca6390 },
2626 { "DLB16390", (kernel_ulong_t)&qca_soc_data_qca6390 },
2627 { "DLB26390", (kernel_ulong_t)&qca_soc_data_qca6390 },
2628 { },
2629 };
2630 MODULE_DEVICE_TABLE(acpi, qca_bluetooth_acpi_match);
2631 #endif
2632
2633 #ifdef CONFIG_DEV_COREDUMP
hciqca_coredump(struct device * dev)2634 static void hciqca_coredump(struct device *dev)
2635 {
2636 struct serdev_device *serdev = to_serdev_device(dev);
2637 struct qca_serdev *qcadev = serdev_device_get_drvdata(serdev);
2638 struct hci_uart *hu = &qcadev->serdev_hu;
2639 struct hci_dev *hdev = hu->hdev;
2640
2641 if (hdev->dump.coredump)
2642 hdev->dump.coredump(hdev);
2643 }
2644 #endif
2645
2646 static struct serdev_device_driver qca_serdev_driver = {
2647 .probe = qca_serdev_probe,
2648 .remove = qca_serdev_remove,
2649 .driver = {
2650 .name = "hci_uart_qca",
2651 .of_match_table = of_match_ptr(qca_bluetooth_of_match),
2652 .acpi_match_table = ACPI_PTR(qca_bluetooth_acpi_match),
2653 .shutdown = qca_serdev_shutdown,
2654 .pm = &qca_pm_ops,
2655 #ifdef CONFIG_DEV_COREDUMP
2656 .coredump = hciqca_coredump,
2657 #endif
2658 },
2659 };
2660
qca_init(void)2661 int __init qca_init(void)
2662 {
2663 serdev_device_driver_register(&qca_serdev_driver);
2664
2665 return hci_uart_register_proto(&qca_proto);
2666 }
2667
qca_deinit(void)2668 int __exit qca_deinit(void)
2669 {
2670 serdev_device_driver_unregister(&qca_serdev_driver);
2671
2672 return hci_uart_unregister_proto(&qca_proto);
2673 }
2674