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Searched refs:pll_d (Results 1 – 8 of 8) sorted by relevance

/openbmc/u-boot/arch/arm/mach-keystone/
H A Dcmd_clock.c18 .pll_d = 1,
46 cmd_pll_data.pll_d = simple_strtoul(argv[3], NULL, 10); in do_pll_cmd()
51 cmd_pll_data.pll_d, cmd_pll_data.pll_od); in do_pll_cmd()
H A Dclock.c65 plld = (data->pll_d - 1) & CFG_PLLCTL0_PLLD_MASK; in configure_mult_div()
/openbmc/linux/sound/soc/codecs/
H A Dtlv320aic3x.c1046 u16 d, pll_d = 1; in aic3x_hw_params() local
1137 pll_j = j; pll_d = 0; in aic3x_hw_params()
1164 pll_j = j; pll_d = d; pll_r = 1; pll_p = p; in aic3x_hw_params()
1184 (pll_d >> 6) << PLLD_MSB_SHIFT); in aic3x_hw_params()
1186 (pll_d & 0x3F) << PLLD_LSB_SHIFT); in aic3x_hw_params()
1381 unsigned int pll_c, pll_d; in aic3x_set_power() local
1405 pll_d = snd_soc_component_read(component, AIC3X_PLL_PROGD_REG); in aic3x_set_power()
1407 pll_d == aic3x_reg[AIC3X_PLL_PROGD_REG].def) { in aic3x_set_power()
1409 snd_soc_component_write(component, AIC3X_PLL_PROGD_REG, pll_d); in aic3x_set_power()
H A Dtlv320aic31xx.c187 u16 pll_d; member
918 aic31xx_divs[i].pll_d >> 8); in aic31xx_setup_pll()
920 aic31xx_divs[i].pll_d & 0xff); in aic31xx_setup_pll()
948 aic31xx_divs[i].pll_d, in aic31xx_setup_pll()
H A Dtlv320adc3xxx.c474 u16 pll_d; member
1136 adc3xxx_divs[i].pll_d & ADC3XXX_PLLD_LSB_MASK); in adc3xxx_setup_pll()
1138 (adc3xxx_divs[i].pll_d >> 8) & ADC3XXX_PLLD_MSB_MASK); in adc3xxx_setup_pll()
H A Dpcm512x.c42 int pll_d; member
851 pcm512x->pll_d = D; in pcm512x_find_pll_coeff()
968 PCM512x_PLL_COEFF_2, pcm512x->pll_d >> 8); in pcm512x_set_dividers()
975 PCM512x_PLL_COEFF_3, pcm512x->pll_d & 0xff); in pcm512x_set_dividers()
/openbmc/u-boot/arch/arm/mach-keystone/include/mach/
H A Dclock.h115 int pll_d; /* PLL divider */ member
/openbmc/u-boot/doc/device-tree-bindings/clock/
H A Dnvidia,tegra20-car.txt147 116 pll_d