/openbmc/linux/drivers/gpu/drm/i915/display/ |
H A D | dvo_ns2501.c | 210 u8 pll_a; /* PLL configuration, register A, 1B */ member 237 .pll_a = 17, 257 .pll_a = 25, 276 .pll_a = 11, 614 ns2501_writeb(dvo, NS2501_REG1B, conf->pll_a); in ns2501_mode_set()
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/openbmc/linux/arch/arm/boot/dts/nvidia/ |
H A D | tegra20-plutux.dts | 60 clock-names = "pll_a", "pll_a_out0", "mclk";
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H A D | tegra20-tec.dts | 69 clock-names = "pll_a", "pll_a_out0", "mclk";
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H A D | tegra20-medcom-wide.dts | 95 clock-names = "pll_a", "pll_a_out0", "mclk";
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H A D | tegra20-trimslice.dts | 475 clock-names = "pll_a", "pll_a_out0", "mclk";
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H A D | tegra114-asus-tf701t.dts | 753 clock-names = "pll_a", "pll_a_out0", "mclk";
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H A D | tegra30-cardhu.dtsi | 671 clock-names = "pll_a", "pll_a_out0", "mclk";
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H A D | tegra20-paz00.dts | 689 clock-names = "pll_a", "pll_a_out0", "mclk";
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H A D | tegra20-ventana.dts | 722 clock-names = "pll_a", "pll_a_out0", "mclk";
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H A D | tegra124-nyan.dtsi | 796 clock-names = "pll_a", "pll_a_out0", "mclk";
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H A D | tegra20-harmony.dts | 761 clock-names = "pll_a", "pll_a_out0", "mclk";
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H A D | tegra20-colibri.dtsi | 776 clock-names = "pll_a", "pll_a_out0", "mclk";
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H A D | tegra20-seaboard.dts | 920 clock-names = "pll_a", "pll_a_out0", "mclk";
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H A D | tegra30-colibri.dtsi | 1057 clock-names = "pll_a", "pll_a_out0", "mclk";
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H A D | tegra124-venice2.dts | 1248 clock-names = "pll_a", "pll_a_out0", "mclk";
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H A D | tegra20-asus-tf101.dts | 1205 clock-names = "pll_a", "pll_a_out0", "mclk";
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H A D | tegra114-dalmore.dts | 1281 clock-names = "pll_a", "pll_a_out0", "mclk";
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H A D | tegra30-apalis-v1.1.dtsi | 1196 clock-names = "pll_a", "pll_a_out0", "mclk";
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H A D | tegra30-apalis.dtsi | 1179 clock-names = "pll_a", "pll_a_out0", "mclk";
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/openbmc/u-boot/doc/device-tree-bindings/clock/ |
H A D | nvidia,tegra20-car.txt | 143 112 pll_a
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/openbmc/u-boot/arch/arm/dts/ |
H A D | tegra20-paz00.dts | 634 clock-names = "pll_a", "pll_a_out0", "mclk";
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H A D | tegra124-nyan.dtsi | 707 clock-names = "pll_a", "pll_a_out0", "mclk";
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H A D | tegra20-ventana.dts | 727 clock-names = "pll_a", "pll_a_out0", "mclk";
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H A D | tegra20-harmony.dts | 812 clock-names = "pll_a", "pll_a_out0", "mclk";
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H A D | tegra20-seaboard.dts | 982 clock-names = "pll_a", "pll_a_out0", "mclk";
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