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Searched refs:phy_reg0_val (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/drivers/ddr/marvell/a38x/
H A Dddr3_init.h98 extern u32 phy_reg0_val;
H A Dddr3_training.c15 u32 phy_reg0_val = 0; variable
1890 phy_reg0_val)); in ddr3_tip_ddr3_reset_phy_regs()