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Searched refs:phy_read (Results 1 – 25 of 49) sorted by relevance

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/openbmc/u-boot/drivers/net/phy/
H A Dgeneric_10g.c40 phy_read(phydev, devad, MDIO_STAT1); in gen10g_startup()
41 reg = phy_read(phydev, devad, MDIO_STAT1); in gen10g_startup()
57 stat2 = phy_read(phydev, mmd, MDIO_STAT2); in gen10g_discover_mmds()
63 devs1 = phy_read(phydev, mmd, MDIO_DEVS1); in gen10g_discover_mmds()
64 devs2 = phy_read(phydev, mmd, MDIO_DEVS2); in gen10g_discover_mmds()
H A Dvitesse.c90 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_CIS82xx_AUX_CONSTAT); in vitesse_parse_status()
150 ret = phy_read(phydev, MDIO_DEVAD_NONE, MII_VSC8601_EPHY_CTL); in vsc8601_add_skew()
178 val = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_VSC8574_GENERAL19); in vsc8574_config()
195 val = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_VSC8574_GENERAL18); in vsc8574_config()
198 val = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_VSC8574_GENERAL18); in vsc8574_config()
203 val = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_VSC8574_MAC_SERDES_CON); in vsc8574_config()
223 val = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_VSC8514_GENERAL19); in vsc8514_config()
238 val = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_VSC8514_GENERAL18); in vsc8514_config()
241 val = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_VSC8514_GENERAL18); in vsc8514_config()
251 val = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_VSC8514_GENERAL23); in vsc8514_config()
[all …]
H A Dmarvell.c108 int oldpage = phy_read(phydev, MDIO_DEVAD_NONE, MII_MARVELL_PHY_PAGE); in m88e1xxx_phy_extread()
112 val = phy_read(phydev, MDIO_DEVAD_NONE, regnum); in m88e1xxx_phy_extread()
121 int oldpage = phy_read(phydev, MDIO_DEVAD_NONE, MII_MARVELL_PHY_PAGE); in m88e1xxx_phy_extwrite()
157 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_88E1xxx_PHY_STATUS); in m88e1xxx_parse_status()
175 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, in m88e1xxx_parse_status()
226 reg = phy_read(phydev, in m88e1111s_config()
242 reg = phy_read(phydev, in m88e1111s_config()
257 reg = phy_read(phydev, in m88e1111s_config()
269 reg = phy_read(phydev, in m88e1111s_config()
275 reg = phy_read(phydev, MDIO_DEVAD_NONE, in m88e1111s_config()
[all …]
H A Drealtek.c64 int oldpage = phy_read(phydev, MDIO_DEVAD_NONE, in rtl8211f_phy_extread()
69 val = phy_read(phydev, MDIO_DEVAD_NONE, regnum); in rtl8211f_phy_extread()
78 int oldpage = phy_read(phydev, MDIO_DEVAD_NONE, in rtl8211f_phy_extwrite()
120 reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_CTRL1000); in rtl8211x_config()
134 reg = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_RTL8211E_CONFREG); in rtl8211x_config()
144 phy_read(phydev, MDIO_DEVAD_NONE, MIIM_RTL8211x_PHY_INER); in rtl8211x_config()
159 reg = phy_read(phydev, MDIO_DEVAD_NONE, 0x11); in rtl8211f_config()
171 reg = phy_read(phydev, MDIO_DEVAD_NONE, 0x15); in rtl8211f_config()
200 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_RTL8211x_PHY_STATUS); in rtl8211x_parse_status()
219 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, in rtl8211x_parse_status()
[all …]
H A Daquantia.c160 up_crc = phy_read(phydev, MDIO_MMD_VEND1, MAILBOX_CRC); in aquantia_load_memory()
262 id = phy_read(phydev, MDIO_MMD_VEND1, GLOBAL_FIRMWARE_ID); in aquantia_config()
263 rstatus = phy_read(phydev, MDIO_MMD_VEND1, GLOBAL_RSTATUS_1); in aquantia_config()
264 fault = phy_read(phydev, MDIO_MMD_VEND1, GLOBAL_FAULT); in aquantia_config()
282 val = phy_read(phydev, MDIO_MMD_PMAPMD, MII_BMCR); in aquantia_config()
302 val = phy_read(phydev, MDIO_MMD_PHYXS, in aquantia_config()
332 val = phy_read(phydev, MDIO_MMD_VEND1, AQUANTIA_RESERVED_STATUS); in aquantia_config()
333 reg_val1 = phy_read(phydev, MDIO_MMD_VEND1, AQUANTIA_FIRMWARE_ID); in aquantia_config()
352 phy_read(phydev, MDIO_MMD_AN, MDIO_STAT1); in aquantia_startup()
353 reg = phy_read(phydev, MDIO_MMD_AN, MDIO_STAT1); in aquantia_startup()
[all …]
H A Dphy.c46 adv = phy_read(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE); in genphy_config_advert()
79 bmsr = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR); in genphy_config_advert()
91 adv = phy_read(phydev, MDIO_DEVAD_NONE, MII_CTRL1000); in genphy_config_advert()
153 ctl = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR); in genphy_restart_aneg()
193 int ctl = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR); in genphy_config_aneg()
228 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR); in genphy_update_link()
263 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR); in genphy_update_link()
269 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR); in genphy_update_link()
291 int mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR); in genphy_parse_link()
305 gblpa = phy_read(phydev, MDIO_DEVAD_NONE, MII_STAT1000); in genphy_parse_link()
[all …]
H A Dbroadcom.c44 reg_val = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_BCM54xx_AUXCNTL); in bcm_phy_write_misc()
66 reg18 = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_BCM54xx_AUXCNTL); in bcm5461_config()
80 reg1c = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_BCM54XX_SHD); in bcm5461_config()
97 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_BCM54xx_AUXSTATUS); in bcm54xx_parse_status()
157 return (phy_read(phydev, MDIO_DEVAD_NONE, reg) & 0x8FFF) | 0x8010; in bcm5482_read_wirespeed()
165 reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR); in bcm5482_config()
264 val = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_BCM54XX_EXP_DATA); in bcm5482_is_serdes()
300 val = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_BCM54XX_EXP_DATA); in bcm5482_parse_serdes_sr()
H A Det1011c.c30 ctl = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR); in et1011c_config()
46 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, ET1011C_STATUS_REG); in et1011c_parse_status()
57 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, ET1011C_CONFIG_REG); in et1011c_parse_status()
H A Dmeson-gxl.c62 wol = phy_read(phydev, MDIO_DEVAD_NONE, 0x15); in meson_gxl_startup()
66 lpa = phy_read(phydev, MDIO_DEVAD_NONE, MII_LPA); in meson_gxl_startup()
70 exp = phy_read(phydev, MDIO_DEVAD_NONE, MII_EXPANSION); in meson_gxl_startup()
H A Dxilinx_phy.c47 status = phy_read(phydev, MDIO_DEVAD_NONE, MII_LPA); in xilinxphy_startup()
69 int bmcr = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR); in xilinxphy_startup()
122 temp = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR); in xilinxphy_config()
H A Dnatsemi.c24 ptp_coc_reg = phy_read(phydev, MDIO_DEVAD_NONE, in dp83630_config()
68 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_DP83865_LANR); in dp83865_parse_status()
121 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR); in dp83848_parse_status()
H A Dmscc.c662 addr = phy_read(phydev, MDIO_DEVAD_NONE, MSCC_PHY_EXT_PHY_CNTL_4); in vsc8574_config_pre_init()
665 reg = phy_read(phydev, MDIO_DEVAD_NONE, MSCC_PHY_ACTIPHY_CNTL); in vsc8574_config_pre_init()
865 addr = phy_read(phydev, MDIO_DEVAD_NONE, MSCC_PHY_EXT_PHY_CNTL_4); in vsc8584_config_pre_init()
868 reg = phy_read(phydev, MDIO_DEVAD_NONE, MSCC_PHY_ACTIPHY_CNTL); in vsc8584_config_pre_init()
1020 reg_val = phy_read(phydev, MDIO_DEVAD_NONE, MSCC_PHY_REG_TR_DATA_17); in mscc_vsc8531_vsc8541_init_scripts()
1034 reg_val = phy_read(phydev, MDIO_DEVAD_NONE, MSCC_PHY_REG_TR_DATA_18); in mscc_vsc8531_vsc8541_init_scripts()
1048 reg_val = phy_read(phydev, MDIO_DEVAD_NONE, MSCC_PHY_REG_TR_DATA_18); in mscc_vsc8531_vsc8541_init_scripts()
1054 reg_val = phy_read(phydev, MDIO_DEVAD_NONE, MSCC_PHY_REG_TR_DATA_17); in mscc_vsc8531_vsc8541_init_scripts()
1075 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_AUX_CNTRL_STAT_REG); in mscc_parse_status()
1124 reg_val = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR); in mscc_phy_soft_reset()
[all …]
H A Dteranetics.c29 phy_hwversion = (phy_read(phydev, 30, 32) >> 12) & 0xf; in tn2020_config()
56 int reg = phy_read(phydev, MDIO_MMD_PHYXS, MDIO_PHYXS_LNSTAT); in tn2020_startup()
H A Datheros.c63 regval = phy_read(phydev, MDIO_DEVAD_NONE, 0xe); in ar8035_config()
67 regval = phy_read(phydev, MDIO_DEVAD_NONE, 0x1e); in ar8035_config()
H A Dmicrel_ksz90x1.c49 phy_ctl = phy_read(phydev, MDIO_DEVAD_NONE, MII_KSZ90xx_PHY_CTL); in ksz90xx_startup()
227 return phy_read(phydev, MDIO_DEVAD_NONE, MII_KSZ9021_EXTENDED_DATAR); in ksz9021_phy_extended_read()
312 return phy_read(phydev, MDIO_DEVAD_NONE, MII_KSZ9031_MMD_REG_DATA); in ksz9031_phy_extended_read()
352 bmcr = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR); in ksz9031_config()
H A Dti.c149 value = phy_read(phydev, addr, MII_MMD_DATA); in phy_read_mmd_indirect()
305 val = phy_read(phydev, MDIO_DEVAD_NONE, DP83867_CTRL); in dp83867_config()
337 val = phy_read(phydev, MDIO_DEVAD_NONE, MII_DP83867_PHYCTRL); in dp83867_config()
348 cfg2 = phy_read(phydev, phydev->addr, MII_DP83867_CFG2); in dp83867_config()
H A Dmicrel_ksz8xxx.c33 ret = phy_read(phydev, MDIO_DEVAD_NONE, MII_KSZPHY_OMSO); in ksz_genconfig_bcastoff()
66 val = phy_read(phydev, MDIO_DEVAD_NONE, MII_KSZ8051_PHY_OMSO); in ksz8051_config()
H A Dcortina.c240 reg_value = phy_read(phydev, 0x00, VILLA_GLOBAL_BIST_STATUS); in cs4340_phy_init()
256 reg_value = phy_read(phydev, 0x00, VILLA_GLOBAL_DWNLD_CHECKSUM_STATUS); in cs4340_phy_init()
291 reg_value = phy_read(phydev, 0x00, CS4223_EEPROM_STATUS); in cs4223_phy_init()
H A Dlxt.c26 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_LXT971_SR2); in lxt971_parse_status()
/openbmc/u-boot/cmd/aspeed/nettest/
H A Dphy.c119 uint16_t phy_read (MAC_ENGINE *eng, int index) in phy_read() function
199 phy_write(eng, adr, ((phy_read(eng, adr) & (~clr_mask)) | set_mask)); in phy_clrset()
210 printf("%02d: %04x ", index, phy_read(eng, index)); in phy_dump()
225 PRINTF(option, "%d:%04x ", 2, phy_read(eng, 2)); in phy_scan_id()
226 PRINTF(option, "%d:%04x ", 3, phy_read(eng, 3)); in phy_scan_id()
256 phy_read(eng, PHY_REG_BMCR), eng->phy.Adr, in phy_basic_setting()
260 phy_read(eng, PHY_REG_BMCR), eng->phy.Adr, in phy_basic_setting()
270 while (phy_read(eng, PHY_REG_BMCR) & 0x8000) { in phy_wait_reset_done()
283 phy_read(eng, PHY_REG_BMCR), eng->phy.Adr, in phy_wait_reset_done()
287 phy_read(eng, PHY_REG_BMCR), eng->phy.Adr, in phy_wait_reset_done()
[all …]
/openbmc/u-boot/board/gdsys/a38x/
H A Dihs_phys.c33 reg = phy_read(phydev, MDIO_DEVAD_NONE, 16); in ihs_phy_config()
41 reg = phy_read(phydev, MDIO_DEVAD_NONE, 26); in ihs_phy_config()
51 reg = phy_read(phydev, MDIO_DEVAD_NONE, 4); in ihs_phy_config()
54 reg = phy_read(phydev, MDIO_DEVAD_NONE, 9); in ihs_phy_config()
59 reg = phy_read(phydev, MDIO_DEVAD_NONE, 16); in ihs_phy_config()
/openbmc/u-boot/board/spear/x600/
H A Dx600.c76 id1 = phy_read(phydev, MDIO_DEVAD_NONE, 2); in board_phy_config()
77 id2 = phy_read(phydev, MDIO_DEVAD_NONE, 3); in board_phy_config()
/openbmc/u-boot/board/Marvell/db-mv784mp-gp/
H A Ddb-mv784mp-gp.c102 reg = phy_read(phydev, MDIO_DEVAD_NONE, 0x4); in board_phy_config()
111 reg = phy_read(phydev, MDIO_DEVAD_NONE, ETH_PHY_CTRL_REG); in board_phy_config()
/openbmc/u-boot/board/compulab/cl-som-imx7/
H A Dcl-som-imx7.c138 val = phy_read(phydev, MDIO_DEVAD_NONE, 0xe); in cl_som_imx7_rgmii_rework()
147 val = phy_read(phydev, MDIO_DEVAD_NONE, 0xe); in cl_som_imx7_rgmii_rework()
154 val = phy_read(phydev, MDIO_DEVAD_NONE, 0x1e); in cl_som_imx7_rgmii_rework()
/openbmc/u-boot/board/k+p/kp_imx6q_tpc/
H A Dkp_imx6q_tpc.c144 val = phy_read(phydev, MDIO_DEVAD_NONE, 0xe); in ar8031_phy_fixup()
151 val = phy_read(phydev, MDIO_DEVAD_NONE, 0x1e); in ar8031_phy_fixup()

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