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Searched refs:phy (Results 1 – 25 of 681) sorted by relevance

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/openbmc/u-boot/include/
H A Dgeneric-phy.h24 struct phy { struct
53 int (*of_xlate)(struct phy *phy, struct ofnode_phandle_args *args);
67 int (*init)(struct phy *phy);
82 int (*exit)(struct phy *phy);
94 int (*reset)(struct phy *phy);
108 int (*power_on)(struct phy *phy);
122 int (*power_off)(struct phy *phy);
133 int generic_phy_init(struct phy *phy);
141 int generic_phy_exit(struct phy *phy);
149 int generic_phy_reset(struct phy *phy);
[all …]
H A Dphy-sun4i-usb.h16 int sun4i_usb_phy_id_detect(struct phy *phy);
24 int sun4i_usb_phy_vbus_detect(struct phy *phy);
32 void sun4i_usb_phy_set_squelch_detect(struct phy *phy, bool enabled);
/openbmc/u-boot/drivers/phy/
H A Dphy-uclass.c16 static int generic_phy_xlate_offs_flags(struct phy *phy, in generic_phy_xlate_offs_flags() argument
19 debug("%s(phy=%p)\n", __func__, phy); in generic_phy_xlate_offs_flags()
27 phy->id = args->args[0]; in generic_phy_xlate_offs_flags()
29 phy->id = 0; in generic_phy_xlate_offs_flags()
35 struct phy *phy) in generic_phy_get_by_index() argument
42 debug("%s(dev=%p, index=%d, phy=%p)\n", __func__, dev, index, phy); in generic_phy_get_by_index()
44 assert(phy); in generic_phy_get_by_index()
45 phy->dev = NULL; in generic_phy_get_by_index()
74 phy->dev = phydev; in generic_phy_get_by_index()
79 ret = ops->of_xlate(phy, &args); in generic_phy_get_by_index()
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H A DMakefile6 obj-$(CONFIG_$(SPL_)PHY) += phy-uclass.o
7 obj-$(CONFIG_$(SPL_)NOP_PHY) += nop-phy.o
8 obj-$(CONFIG_BCM6318_USBH_PHY) += bcm6318-usbh-phy.o
9 obj-$(CONFIG_BCM6348_USBH_PHY) += bcm6348-usbh-phy.o
10 obj-$(CONFIG_BCM6358_USBH_PHY) += bcm6358-usbh-phy.o
11 obj-$(CONFIG_BCM6368_USBH_PHY) += bcm6368-usbh-phy.o
12 obj-$(CONFIG_PHY_SANDBOX) += sandbox-phy.o
13 obj-$(CONFIG_$(SPL_)PIPE3_PHY) += ti-pipe3-phy.o
15 obj-$(CONFIG_PHY_RCAR_GEN2) += phy-rcar-gen2.o
16 obj-$(CONFIG_PHY_RCAR_GEN3) += phy-rcar-gen3.o
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H A Dsandbox-phy.c17 static int sandbox_phy_power_on(struct phy *phy) in sandbox_phy_power_on() argument
19 struct sandbox_phy_priv *priv = dev_get_priv(phy->dev); in sandbox_phy_power_on()
32 static int sandbox_phy_power_off(struct phy *phy) in sandbox_phy_power_off() argument
34 struct sandbox_phy_priv *priv = dev_get_priv(phy->dev); in sandbox_phy_power_off()
46 if (phy->id) in sandbox_phy_power_off()
54 static int sandbox_phy_init(struct phy *phy) in sandbox_phy_init() argument
56 struct sandbox_phy_priv *priv = dev_get_priv(phy->dev); in sandbox_phy_init()
64 static int sandbox_phy_exit(struct phy *phy) in sandbox_phy_exit() argument
66 struct sandbox_phy_priv *priv = dev_get_priv(phy->dev); in sandbox_phy_exit()
H A Dphy-rcar-gen2.c51 static int rcar_gen2_phy_phy_init(struct phy *phy) in rcar_gen2_phy_phy_init() argument
53 struct rcar_gen2_phy *priv = dev_get_priv(phy->dev); in rcar_gen2_phy_phy_init()
54 u16 chan = phy->id & 0xffff; in rcar_gen2_phy_phy_init()
55 u16 mode = (phy->id >> 16) & 0xffff; in rcar_gen2_phy_phy_init()
72 static int rcar_gen2_phy_phy_power_on(struct phy *phy) in rcar_gen2_phy_phy_power_on() argument
74 struct rcar_gen2_phy *priv = dev_get_priv(phy->dev); in rcar_gen2_phy_phy_power_on()
96 static int rcar_gen2_phy_phy_power_off(struct phy *phy) in rcar_gen2_phy_phy_power_off() argument
98 struct rcar_gen2_phy *priv = dev_get_priv(phy->dev); in rcar_gen2_phy_phy_power_off()
110 static int rcar_gen2_phy_of_xlate(struct phy *phy, in rcar_gen2_phy_of_xlate() argument
114 dev_err(phy->dev, "Invalid DT PHY argument count: %d\n", in rcar_gen2_phy_of_xlate()
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H A Dsti_usb_phy.c43 static int sti_usb_phy_deassert(struct sti_usb_phy *phy) in sti_usb_phy_deassert() argument
47 ret = reset_deassert(&phy->global_ctl); in sti_usb_phy_deassert()
53 ret = reset_deassert(&phy->port_ctl); in sti_usb_phy_deassert()
60 static int sti_usb_phy_init(struct phy *usb_phy) in sti_usb_phy_init()
63 struct sti_usb_phy *phy = dev_get_priv(dev); in sti_usb_phy_init() local
67 reg = (void __iomem *)phy->regmap->ranges[0].start + phy->ctrl; in sti_usb_phy_init()
72 reg = (void __iomem *)phy->regmap->ranges[0].start + phy->param; in sti_usb_phy_init()
76 return sti_usb_phy_deassert(phy); in sti_usb_phy_init()
79 static int sti_usb_phy_exit(struct phy *usb_phy) in sti_usb_phy_exit()
82 struct sti_usb_phy *phy = dev_get_priv(dev); in sti_usb_phy_exit() local
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H A Dkeystone-usb-phy.c28 static int keystone_usb_init(struct phy *phy) in keystone_usb_init() argument
31 struct udevice *dev = phy->dev; in keystone_usb_init()
47 static int keystone_usb_power_on(struct phy *phy) in keystone_usb_power_on() argument
50 struct udevice *dev = phy->dev; in keystone_usb_power_on()
60 static int keystone_usb_power_off(struct phy *phy) in keystone_usb_power_off() argument
63 struct udevice *dev = phy->dev; in keystone_usb_power_off()
73 static int keystone_usb_exit(struct phy *phy) in keystone_usb_exit() argument
/openbmc/u-boot/drivers/video/sunxi/
H A Dsunxi_dw_hdmi.c58 struct sunxi_hdmi_phy * const phy = in sunxi_dw_hdmi_phy_init() local
67 writel(0, &phy->ctrl); in sunxi_dw_hdmi_phy_init()
68 setbits_le32(&phy->ctrl, BIT(0)); in sunxi_dw_hdmi_phy_init()
70 setbits_le32(&phy->ctrl, BIT(16)); in sunxi_dw_hdmi_phy_init()
71 setbits_le32(&phy->ctrl, BIT(1)); in sunxi_dw_hdmi_phy_init()
73 setbits_le32(&phy->ctrl, BIT(2)); in sunxi_dw_hdmi_phy_init()
75 setbits_le32(&phy->ctrl, BIT(3)); in sunxi_dw_hdmi_phy_init()
77 setbits_le32(&phy->ctrl, BIT(19)); in sunxi_dw_hdmi_phy_init()
79 setbits_le32(&phy->ctrl, BIT(18)); in sunxi_dw_hdmi_phy_init()
80 setbits_le32(&phy->ctrl, 7 << 4); in sunxi_dw_hdmi_phy_init()
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/openbmc/u-boot/drivers/usb/dwc3/
H A Dti_usb_phy.c116 static struct usb3_dpll_params *ti_usb3_get_dpll_params(struct ti_usb_phy *phy) in ti_usb3_get_dpll_params() argument
119 struct usb3_dpll_map *dpll_map = phy->dpll_map; in ti_usb3_get_dpll_params()
128 dev_err(phy->dev, "No DPLL configuration for %lu Hz SYS CLK\n", rate); in ti_usb3_get_dpll_params()
133 static int ti_usb3_dpll_wait_lock(struct ti_usb_phy *phy) in ti_usb3_dpll_wait_lock() argument
137 val = ti_usb3_readl(phy->pll_ctrl_base, PLL_STATUS); in ti_usb3_dpll_wait_lock()
145 static int ti_usb3_dpll_program(struct ti_usb_phy *phy) in ti_usb3_dpll_program() argument
150 if (!phy->pll_ctrl_base) in ti_usb3_dpll_program()
153 dpll_params = ti_usb3_get_dpll_params(phy); in ti_usb3_dpll_program()
157 val = ti_usb3_readl(phy->pll_ctrl_base, PLL_CONFIGURATION1); in ti_usb3_dpll_program()
160 ti_usb3_writel(phy->pll_ctrl_base, PLL_CONFIGURATION1, val); in ti_usb3_dpll_program()
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H A Dsamsung_usb_phy.c14 void exynos5_usb3_phy_init(struct exynos_usb3_phy *phy) in exynos5_usb3_phy_init() argument
19 writel(0x0, &phy->phy_reg0); in exynos5_usb3_phy_init()
21 clrbits_le32(&phy->phy_param0, in exynos5_usb3_phy_init()
26 setbits_le32(&phy->phy_param0, PHYPARAM0_REF_LOSLEVEL); in exynos5_usb3_phy_init()
29 writel(0x0, &phy->phy_resume); in exynos5_usb3_phy_init()
35 setbits_le32(&phy->link_system, in exynos5_usb3_phy_init()
40 clrbits_le32(&phy->phy_param1, PHYPARAM1_PCS_TXDEEMPH_MASK); in exynos5_usb3_phy_init()
41 setbits_le32(&phy->phy_param1, PHYPARAM1_PCS_TXDEEMPH); in exynos5_usb3_phy_init()
43 setbits_le32(&phy->phy_batchg, PHYBATCHG_UTMI_CLKSEL); in exynos5_usb3_phy_init()
46 clrbits_le32(&phy->phy_test, in exynos5_usb3_phy_init()
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/openbmc/u-boot/board/highbank/
H A Dahci.c41 static u32 __combo_phy_reg_read(u8 phy, u8 dev, u32 addr) in __combo_phy_reg_read() argument
44 writel(CPHY_MAP(dev, addr), CPHY_BASE + 0x800 + CPHY_WIDTH * phy); in __combo_phy_reg_read()
45 data = readl(CPHY_ADDR(CPHY_BASE + CPHY_WIDTH * phy, dev, addr)); in __combo_phy_reg_read()
49 static void __combo_phy_reg_write(u8 phy, u8 dev, u32 addr, u32 data) in __combo_phy_reg_write() argument
51 writel(CPHY_MAP(dev, addr), CPHY_BASE + 0x800 + CPHY_WIDTH * phy); in __combo_phy_reg_write()
52 writel(data, CPHY_ADDR(CPHY_BASE + CPHY_WIDTH * phy, dev, addr)); in __combo_phy_reg_write()
55 static u32 combo_phy_read(u8 phy, u32 addr) in combo_phy_read() argument
58 if (phy == 5) in combo_phy_read()
60 while (__combo_phy_reg_read(phy, dev, SERDES_CR_CTL) & CR_BUSY) in combo_phy_read()
62 __combo_phy_reg_write(phy, dev, SERDES_CR_ADDR, addr); in combo_phy_read()
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/openbmc/u-boot/drivers/usb/gadget/
H A Ddwc2_udc_otg_phy.c42 struct dwc2_usbotg_phy *phy = in otg_phy_init() local
54 writel((readl(&phy->phypwr) in otg_phy_init()
56 &~FORCE_SUSPEND_0), &phy->phypwr); in otg_phy_init()
58 writel((readl(&phy->phypwr) &~(OTG_DISABLE_0 | ANALOG_PWRDOWN) in otg_phy_init()
59 &~FORCE_SUSPEND_0), &phy->phypwr); in otg_phy_init()
62 writel((readl(&phy->phyclk) & ~(EXYNOS4X12_ID_PULLUP0 | in otg_phy_init()
64 &phy->phyclk); /* PLL 24Mhz */ in otg_phy_init()
66 writel((readl(&phy->phyclk) & ~(ID_PULLUP0 | COMMON_ON_N0)) | in otg_phy_init()
67 CLK_SEL_24MHZ, &phy->phyclk); /* PLL 24Mhz */ in otg_phy_init()
69 writel((readl(&phy->rstcon) &~(LINK_SW_RST | PHYLNK_SW_RST)) in otg_phy_init()
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/openbmc/u-boot/arch/arm/mach-omap2/
H A Dpipe3-phy.c85 static int omap_pipe3_wait_lock(struct omap_pipe3 *phy) in omap_pipe3_wait_lock() argument
92 val = omap_pipe3_readl(phy->pll_ctrl_base, PLL_STATUS); in omap_pipe3_wait_lock()
105 static int omap_pipe3_dpll_program(struct omap_pipe3 *phy) in omap_pipe3_dpll_program() argument
110 dpll_params = omap_pipe3_get_dpll_params(phy); in omap_pipe3_dpll_program()
116 val = omap_pipe3_readl(phy->pll_ctrl_base, PLL_CONFIGURATION1); in omap_pipe3_dpll_program()
119 omap_pipe3_writel(phy->pll_ctrl_base, PLL_CONFIGURATION1, val); in omap_pipe3_dpll_program()
121 val = omap_pipe3_readl(phy->pll_ctrl_base, PLL_CONFIGURATION2); in omap_pipe3_dpll_program()
124 omap_pipe3_writel(phy->pll_ctrl_base, PLL_CONFIGURATION2, val); in omap_pipe3_dpll_program()
126 val = omap_pipe3_readl(phy->pll_ctrl_base, PLL_CONFIGURATION1); in omap_pipe3_dpll_program()
129 omap_pipe3_writel(phy->pll_ctrl_base, PLL_CONFIGURATION1, val); in omap_pipe3_dpll_program()
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/openbmc/u-boot/drivers/phy/allwinner/
H A Dphy-sun4i-usb.c136 static void sun4i_usb_phy_write(struct phy *phy, u32 addr, u32 data, int len) in sun4i_usb_phy_write() argument
138 struct sun4i_usb_phy_data *phy_data = dev_get_priv(phy->dev); in sun4i_usb_phy_write()
139 struct sun4i_usb_phy_plat *usb_phy = &phy_data->usb_phy[phy->id]; in sun4i_usb_phy_write()
181 static void sun4i_usb_phy_passby(struct phy *phy, bool enable) in sun4i_usb_phy_passby() argument
183 struct sun4i_usb_phy_data *data = dev_get_priv(phy->dev); in sun4i_usb_phy_passby()
184 struct sun4i_usb_phy_plat *usb_phy = &data->usb_phy[phy->id]; in sun4i_usb_phy_passby()
208 static int sun4i_usb_phy_power_on(struct phy *phy) in sun4i_usb_phy_power_on() argument
210 struct sun4i_usb_phy_data *data = dev_get_priv(phy->dev); in sun4i_usb_phy_power_on()
211 struct sun4i_usb_phy_plat *usb_phy = &data->usb_phy[phy->id]; in sun4i_usb_phy_power_on()
228 static int sun4i_usb_phy_power_off(struct phy *phy) in sun4i_usb_phy_power_off() argument
[all …]
/openbmc/u-boot/cmd/aspeed/nettest/
H A Dphy.c73 MDIO_SET_PHY_ADDR(eng->phy.Adr) | in phy_write()
91 MDIO_SET_PHY_ADDR_OLD(eng->phy.Adr) | in phy_write()
110 eng->phy.Adr, eng->run.mdio_base); in phy_write()
113 data, eng->phy.Adr, eng->run.mdio_base); in phy_write()
131 writel(MDIO_RD_CODE | MDIO_SET_PHY_ADDR(eng->phy.Adr) | in phy_read()
153 MDIO_SET_PHY_ADDR_OLD(eng->phy.Adr) | in phy_read()
178 eng->phy.Adr, eng->run.mdio_base); in phy_read()
181 read_value, eng->phy.Adr, eng->run.mdio_base); in phy_read()
192 clr_mask, set_mask, eng->phy.Adr, eng->run.mdio_base); in phy_clrset()
196 adr, clr_mask, set_mask, eng->phy.Adr, in phy_clrset()
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/openbmc/u-boot/arch/arm/mach-tegra/
H A Dxusb-padctl-common.c15 int tegra_xusb_phy_prepare(struct tegra_xusb_phy *phy) in tegra_xusb_phy_prepare() argument
17 if (phy && phy->ops && phy->ops->prepare) in tegra_xusb_phy_prepare()
18 return phy->ops->prepare(phy); in tegra_xusb_phy_prepare()
20 return phy ? -ENOSYS : -EINVAL; in tegra_xusb_phy_prepare()
23 int tegra_xusb_phy_enable(struct tegra_xusb_phy *phy) in tegra_xusb_phy_enable() argument
25 if (phy && phy->ops && phy->ops->enable) in tegra_xusb_phy_enable()
26 return phy->ops->enable(phy); in tegra_xusb_phy_enable()
28 return phy ? -ENOSYS : -EINVAL; in tegra_xusb_phy_enable()
31 int tegra_xusb_phy_disable(struct tegra_xusb_phy *phy) in tegra_xusb_phy_disable() argument
33 if (phy && phy->ops && phy->ops->disable) in tegra_xusb_phy_disable()
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/openbmc/u-boot/arch/arm/mach-uniphier/dram/
H A Dcmd_ddrmphy.c36 } phy[UNIPHIER_MAX_NR_DDRMPHY]; member
43 .phy = {
52 .phy = {
74 int phy, dx; in dump_loop() local
76 for (phy = 0; phy < param->nr_phy; phy++) { in dump_loop()
77 phy_base = ioremap(param->phy[phy].base, SZ_4K); in dump_loop()
80 for (dx = 0; dx < param->phy[phy].nr_dx; dx++) { in dump_loop()
81 printf("PHY%dDX%d:", phy, dx); in dump_loop()
95 int phy, zq, i; in zq_dump() local
100 for (phy = 0; phy < param->nr_phy; phy++) { in zq_dump()
[all …]
H A Dcmd_ddrphy.c36 } phy[UNIPHIER_MAX_NR_DDRPHY]; member
43 .phy = {
51 .phy = {
61 .phy = {
69 .phy = {
89 int phy, dx; in dump_loop() local
91 for (phy = 0; phy < param->nr_phy; phy++) { in dump_loop()
92 phy_base = ioremap(param->phy[phy].base, SZ_4K); in dump_loop()
95 for (dx = 0; dx < param->phy[phy].nr_dx; dx++) { in dump_loop()
96 printf("PHY%dDX%d:", phy, dx); in dump_loop()
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/openbmc/u-boot/drivers/usb/host/
H A Dxhci-exynos5.c93 static void exynos5_usb3_phy_init(struct exynos_usb3_phy *phy) in exynos5_usb3_phy_init() argument
101 writel(0x0, &phy->phy_reg0); in exynos5_usb3_phy_init()
103 clrbits_le32(&phy->phy_param0, in exynos5_usb3_phy_init()
108 setbits_le32(&phy->phy_param0, PHYPARAM0_REF_LOSLEVEL); in exynos5_usb3_phy_init()
110 writel(0x0, &phy->phy_resume); in exynos5_usb3_phy_init()
116 setbits_le32(&phy->link_system, in exynos5_usb3_phy_init()
121 clrbits_le32(&phy->phy_param1, PHYPARAM1_PCS_TXDEEMPH_MASK); in exynos5_usb3_phy_init()
122 setbits_le32(&phy->phy_param1, PHYPARAM1_PCS_TXDEEMPH); in exynos5_usb3_phy_init()
124 setbits_le32(&phy->phy_batchg, PHYBATCHG_UTMI_CLKSEL); in exynos5_usb3_phy_init()
127 clrbits_le32(&phy->phy_test, in exynos5_usb3_phy_init()
[all …]
/openbmc/u-boot/arch/mips/dts/
H A Dluton_pcb090.dts63 phy-handle = <&phy0>;
67 phy-handle = <&phy1>;
71 phy-handle = <&phy2>;
75 phy-handle = <&phy3>;
79 phy-handle = <&phy4>;
83 phy-handle = <&phy5>;
87 phy-handle = <&phy6>;
91 phy-handle = <&phy7>;
95 phy-handle = <&phy8>;
99 phy-handle = <&phy9>;
[all …]
H A Dluton_pcb091.dts69 phy-handle = <&phy0>;
73 phy-handle = <&phy1>;
77 phy-handle = <&phy2>;
81 phy-handle = <&phy3>;
85 phy-handle = <&phy4>;
89 phy-handle = <&phy5>;
93 phy-handle = <&phy6>;
97 phy-handle = <&phy7>;
101 phy-handle = <&phy8>;
105 phy-handle = <&phy9>;
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/openbmc/u-boot/doc/device-tree-bindings/phy/
H A Dsun4i-usb-phy.txt6 * allwinner,sun4i-a10-usb-phy
7 * allwinner,sun5i-a13-usb-phy
8 * allwinner,sun6i-a31-usb-phy
9 * allwinner,sun7i-a20-usb-phy
10 * allwinner,sun8i-a23-usb-phy
11 * allwinner,sun8i-a33-usb-phy
12 * allwinner,sun8i-a83t-usb-phy
13 * allwinner,sun8i-h3-usb-phy
14 * allwinner,sun8i-v3s-usb-phy
15 * allwinner,sun50i-a64-usb-phy
[all …]
H A Dphy-stm32-usbphyc.txt24 - reg: address and length of the usb phy control register set
25 - clocks: phandle + clock specifier for the PLL phy clock
30 - assigned-clocks: phandle + clock specifier for the PLL phy clock
31 - assigned-clock-parents: the PLL phy clock parent
40 - reg: phy port index
41 - phy-supply: phandle to the regulator providing 3V3 power to the PHY,
42 see phy-bindings.txt in the same directory.
45 - #phy-cells: see phy-bindings.txt in the same directory, must be <0> for PHY
50 usbphyc: usb-phy@5a006000 {
58 usbphyc_port0: usb-phy@0 {
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/openbmc/phosphor-led-sysfs/test/
H A Dphysical.cpp81 phosphor::led::Physical phy(bus, ledObj, std::move(led)); in TEST() local
82 EXPECT_EQ(phy.state(), Action::Off); in TEST()
93 phosphor::led::Physical phy(bus, ledObj, std::move(led)); in TEST() local
94 EXPECT_EQ(phy.state(), Action::On); in TEST()
105 phosphor::led::Physical phy(bus, ledObj, std::move(led)); in TEST() local
106 EXPECT_EQ(phy.state(), Action::Off); in TEST()
117 phosphor::led::Physical phy(bus, ledObj, std::move(led)); in TEST() local
118 EXPECT_EQ(phy.state(), Action::Off); in TEST()
129 phosphor::led::Physical phy(bus, ledObj, std::move(led)); in TEST() local
130 EXPECT_EQ(phy.state(), Action::Off); in TEST()
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