Searched refs:pdiv (Results 1 – 7 of 7) sorted by relevance
| /openbmc/u-boot/drivers/clk/exynos/ |
| H A D | clk-pll.c | 22 unsigned long mdiv, sdiv, pdiv; in pll145x_get_rate() local
26 pdiv = (pll_con1 >> PLL145X_PDIV_SHIFT) & PLL145X_PDIV_MASK; in pll145x_get_rate()
30 do_div(fvco, (pdiv << sdiv)); in pll145x_get_rate()
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| /openbmc/u-boot/arch/arm/cpu/armv7/iproc-common/ |
| H A D | armpll.c | 17 unsigned int pdiv; member
108 armpll_clk_tab[i].pdiv << in armpll_config()
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| /openbmc/qemu/hw/misc/ |
| H A D | bcm2835_cprman.c | 75 uint64_t freq, ndiv, fdiv, pdiv; in pll_update() local
82 pdiv = FIELD_EX32(*pll->reg_a2w_ctrl, A2W_PLLx_CTRL, PDIV); in pll_update()
84 if (!pdiv) { in pll_update()
104 freq /= pdiv; in pll_update()
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| /openbmc/u-boot/arch/arm/mach-exynos/ |
| H A D | exynos4_setup.h | 340 #define SET_PLL(mdiv, pdiv, sdiv) ((ENABLE << 31)\ argument
342 | (pdiv << 8) \
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| H A D | exynos5_setup.h | 22 #define set_pll(mdiv, pdiv, sdiv) (1<<31 | mdiv<<16 | pdiv<<8 | sdiv) argument
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| /openbmc/u-boot/board/samsung/trats/ |
| H A D | setup.h | 229 #define SET_PLL(mdiv, pdiv, sdiv) ((ENABLE << 31)\ argument
231 | (pdiv << 8) \
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| /openbmc/u-boot/arch/arm/include/asm/arch-tegra/ |
| H A D | bpmp_abi.h | 1366 uint16_t pdiv; /**< post divider value */ member
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