pdiv (reference) in projects: openbmc - OpenGrok search results

Searched refs:pdiv (Results 1 – 25 of 46) sorted by relevance

/openbmc/linux/drivers/clk/tegra/
H A D	clk-tegra124.c	`153 { .pdiv = 1, .hw_val = 0 }, 154 { .pdiv = 2, .hw_val = 1 }, 155 { .pdiv = 3, .hw_val = 2 }, 156 { .pdiv = 4, .hw_val = 3 }, 157 { .pdiv = 5, .hw_val = 4 }, 158 { .pdiv = 6, .hw_val = 5 }, 159 { .pdiv = 8, .hw_val = 6 }, 160 { .pdiv = 10, .hw_val = 7 }, 161 { .pdiv = 12, .hw_val = 8 }, 162 { .pdiv = 16, .hw_val = 9 }, [all …]`
H A D	clk-tegra114.c	`149 { .pdiv = 1, .hw_val = 0 }, 150 { .pdiv = 2, .hw_val = 1 }, 151 { .pdiv = 3, .hw_val = 2 }, 152 { .pdiv = 4, .hw_val = 3 }, 153 { .pdiv = 5, .hw_val = 4 }, 154 { .pdiv = 6, .hw_val = 5 }, 155 { .pdiv = 8, .hw_val = 6 }, 156 { .pdiv = 10, .hw_val = 7 }, 157 { .pdiv = 12, .hw_val = 8 }, 158 { .pdiv = 16, .hw_val = 9 }, [all …]`
H A D	clk-tegra210.c	`1465 pllx->params->pdiv_tohw[cfg->p].pdiv / 1000); in tegra210_pllx_dyn_ramp() 1486 u32 pdiv; in tegra210_pll_fixed_mdiv_cfg() local 1493 p = params->round_p_to_pdiv(p, &pdiv); in tegra210_pll_fixed_mdiv_cfg() 1580 { .pdiv = 1, .hw_val = 0 }, 1581 { .pdiv = 2, .hw_val = 1 }, 1582 { .pdiv = 3, .hw_val = 2 }, 1583 { .pdiv = 4, .hw_val = 3 }, 1584 { .pdiv = 5, .hw_val = 4 }, 1585 { .pdiv = 6, .hw_val = 5 }, 1586 { .pdiv = 8, .hw_val = 6 }, [all …]`
H A D	clk-pll.c	`486 while (p_tohw->pdiv) { in _p_div_to_hw() 487 if (p_div <= p_tohw->pdiv) in _p_div_to_hw() 507 while (p_tohw->pdiv) { in _hw_to_p_div() 509 return p_tohw->pdiv; in _hw_to_p_div() 870 int pdiv; in clk_pll_recalc_rate() local 893 pdiv = 1; in clk_pll_recalc_rate() 895 pdiv = _hw_to_p_div(hw, cfg.p); in clk_pll_recalc_rate() 896 if (pdiv < 0) { in clk_pll_recalc_rate() 899 pdiv = 1; in clk_pll_recalc_rate() 906 cfg.m *= pdiv; in clk_pll_recalc_rate() [all …]`
/openbmc/linux/drivers/clk/samsung/
H A D	clk-pll.c	153 u32 pll_con, mdiv, pdiv, sdiv; in samsung_pll2126_recalc_rate() local 158 pdiv = (pll_con >> PLL2126_PDIV_SHIFT) & PLL2126_PDIV_MASK; in samsung_pll2126_recalc_rate() 162 do_div(fvco, (pdiv + 2) << sdiv); in samsung_pll2126_recalc_rate() 186 u32 pll_con, mdiv, pdiv, sdiv; in samsung_pll3000_recalc_rate() local 191 pdiv = (pll_con >> PLL3000_PDIV_SHIFT) & PLL3000_PDIV_MASK; in samsung_pll3000_recalc_rate() 195 do_div(fvco, pdiv << sdiv); in samsung_pll3000_recalc_rate() 224 u32 mdiv, pdiv, sdiv, pll_con; in samsung_pll35xx_recalc_rate() 229 pdiv = (pll_con >> PLL35XX_PDIV_SHIFT) & PLL35XX_PDIV_MASK; in samsung_pll35xx_recalc_rate() 233 do_div(fvco, (pdiv << sdiv)); in samsung_pll35xx_recalc_rate() 246 return (rate->mdiv != old_mdiv \|\| rate->pdiv ! in samsung_pll35xx_mp_change() 223 u32 mdiv, pdiv, sdiv, pll_con; samsung_pll35xx_recalc_rate() local 327 u32 mdiv, pdiv, sdiv, pll_con0, pll_con1; samsung_pll36xx_recalc_rate() local 437 u32 mdiv, pdiv, sdiv, pll_con3; samsung_pll0822x_recalc_rate() local 522 u32 mdiv, pdiv, sdiv, pll_con3, pll_con5; samsung_pll0831x_recalc_rate() local 620 u32 mdiv, pdiv, sdiv, pll_con; samsung_pll45xx_recalc_rate() local 753 u32 mdiv, pdiv, sdiv, kdiv, pll_con0, pll_con1, shift; samsung_pll46xx_recalc_rate() local 882 u32 mdiv, pdiv, sdiv, pll_con; samsung_pll6552_recalc_rate() local 922 u32 mdiv, pdiv, sdiv, kdiv, pll_con0, pll_con1; samsung_pll6553_recalc_rate() local 1001 u32 mdiv, pdiv, sdiv, pll_con; samsung_pll2550xx_recalc_rate() local 1015 samsung_pll2550xx_mp_change(u32 mdiv,u32 pdiv,u32 pll_con) samsung_pll2550xx_mp_change() argument 1102 u32 mdiv, pdiv, sdiv, pll_con0, pll_con1; samsung_pll2650x_recalc_rate() local 1193 u32 mdiv, pdiv, sdiv, pll_con0, pll_con2; samsung_pll2650xx_recalc_rate() local [all...]
H A D	clk-pll.h	`53 .pdiv = (_p), \ 62 .pdiv = (_p), \ 72 .pdiv = (_p), \ 82 .pdiv = (_p), \ 93 .pdiv = (_p), \ 105 unsigned int pdiv; member`
/openbmc/linux/drivers/clk/imx/
H A D	clk-pll14xx.c	104 static long pll14xx_calc_rate(struct clk_pll14xx pll, int mdiv, int pdiv, in pll14xx_calc_rate() argument 111 pdiv = 65536; in pll14xx_calc_rate() 113 do_div(fvco, pdiv << sdiv); in pll14xx_calc_rate() 118 static long pll1443x_calc_kdiv(int mdiv, int pdiv, int sdiv, in pll1443x_calc_kdiv() argument 124 kdiv = ((rate * ((pdiv * 65536) << sdiv) + prate / 2) / prate) - (mdiv * 65536); in pll1443x_calc_kdiv() 133 int mdiv, pdiv, sdiv, kdiv; in imx_pll14xx_calc_settings() local 155 t->pdiv = tt->pdiv; in imx_pll14xx_calc_settings() 163 pdiv = FIELD_GET(PDIV_MASK, pll_div_ctl0); in imx_pll14xx_calc_settings() 168 rate_min = pll14xx_calc_rate(pll, mdiv, pdiv, sdiv, KDIV_MIN, prate); in imx_pll14xx_calc_settings() 169 rate_max = pll14xx_calc_rate(pll, mdiv, pdiv, sdiv, KDIV_MAX, prate); in imx_pll14xx_calc_settings() [all …]
/openbmc/linux/drivers/clk/
H A D	clk-cdce925.c	68 u16 pdiv; /* 1..127 for Y2-Y9; 1..1023 for Y1 / member 289 static void cdce925_clk_set_pdiv(struct clk_cdce925_output data, u16 pdiv) in cdce925_clk_set_pdiv() argument 295 0x03, (pdiv >> 8) & 0x03); in cdce925_clk_set_pdiv() 296 regmap_write(data->chip->regmap, 0x03, pdiv & 0xFF); in cdce925_clk_set_pdiv() 299 regmap_update_bits(data->chip->regmap, 0x16, 0x7F, pdiv); in cdce925_clk_set_pdiv() 302 regmap_update_bits(data->chip->regmap, 0x17, 0x7F, pdiv); in cdce925_clk_set_pdiv() 305 regmap_update_bits(data->chip->regmap, 0x26, 0x7F, pdiv); in cdce925_clk_set_pdiv() 308 regmap_update_bits(data->chip->regmap, 0x27, 0x7F, pdiv); in cdce925_clk_set_pdiv() 311 regmap_update_bits(data->chip->regmap, 0x36, 0x7F, pdiv); in cdce925_clk_set_pdiv() 314 regmap_update_bits(data->chip->regmap, 0x37, 0x7F, pdiv); in cdce925_clk_set_pdiv() [all …]
/openbmc/linux/drivers/clk/bcm/
H A D	clk-iproc-pll.c	104 vco_out->pdiv = 1; in pll_calc_param() 282 unsigned int pdiv; in pll_fractional_change_only() local 296 val = readl(pll->control_base + ctrl->pdiv.offset); in pll_fractional_change_only() 297 pdiv = (val >> ctrl->pdiv.shift) & bit_mask(ctrl->pdiv.width); in pll_fractional_change_only() 299 if (pdiv != vco->pdiv) in pll_fractional_change_only() 321 if (vco->pdiv == 0) in pll_set_rate() 324 ref_freq = parent_rate / vco->pdiv; in pll_set_rate() 411 val = readl(pll->control_base + ctrl->pdiv.offset); in pll_set_rate() 412 val &= ~(bit_mask(ctrl->pdiv.width) << ctrl->pdiv.shift); in pll_set_rate() 413 val \|= vco->pdiv << ctrl->pdiv.shift; in pll_set_rate() [all …]
H A D	clk-iproc-armpll.c	`192 unsigned int pdiv; in iproc_arm_pll_recalc_rate() local 208 pdiv = (val >> IPROC_CLK_PLLARMA_PDIV_SHIFT) & in iproc_arm_pll_recalc_rate() 210 if (pdiv == 0) in iproc_arm_pll_recalc_rate() 211 pdiv = 16; in iproc_arm_pll_recalc_rate() 220 pll->rate = (pll->rate / pdiv) / mdiv; in iproc_arm_pll_recalc_rate() 225 (unsigned int)(ndiv >> 20), pdiv, mdiv); in iproc_arm_pll_recalc_rate()`
H A D	clk-sr.c	`43 .pdiv = REG_VAL(0x14, 0, 4), 103 .pdiv = REG_VAL(0x14, 0, 4), 162 .pdiv = REG_VAL(0x14, 0, 4), 197 .pdiv = REG_VAL(0x14, 0, 4), 251 .pdiv = REG_VAL(0x14, 0, 4), 287 .pdiv = REG_VAL(0x4, 26, 4), 332 .pdiv = REG_VAL(0x4, 26, 4), 371 .pdiv = REG_VAL(0x4, 26, 4),`
H A D	clk-ns2.c	`37 .pdiv = REG_VAL(0x8, 0, 4), 100 .pdiv = REG_VAL(0x8, 0, 4), 162 .pdiv = REG_VAL(0x8, 0, 4), 224 .pdiv = REG_VAL(0x8, 0, 4),`
H A D	clk-cygnus.c	`56 .pdiv = REG_VAL(0x14, 0, 4), 114 .pdiv = REG_VAL(0x4, 26, 4), 192 .pdiv = REG_VAL(0x14, 0, 4), 271 .pdiv = REG_VAL(0x44, 0, 4),`
H A D	clk-iproc.h	`88 unsigned int pdiv; member 164 struct iproc_clk_reg_op pdiv; member`
H A D	clk-nsp.c	`42 .pdiv = REG_VAL(0x18, 24, 3), 99 .pdiv = REG_VAL(0x4, 28, 3),`
/openbmc/u-boot/drivers/clk/exynos/
H A D	clk-pll.c	`22 unsigned long mdiv, sdiv, pdiv; in pll145x_get_rate() local 26 pdiv = (pll_con1 >> PLL145X_PDIV_SHIFT) & PLL145X_PDIV_MASK; in pll145x_get_rate() 30 do_div(fvco, (pdiv << sdiv)); in pll145x_get_rate()`
/openbmc/linux/drivers/thermal/tegra/
H A D	tegra124-soctherm.c	`51 .pdiv = 8, 70 .pdiv = 8, 89 .pdiv = 8, 106 .pdiv = 8,`
H A D	tegra132-soctherm.c	`51 .pdiv = 8, 70 .pdiv = 8, 89 .pdiv = 8, 106 .pdiv = 8,`
H A D	tegra210-soctherm.c	`52 .pdiv = 8, 71 .pdiv = 8, 90 .pdiv = 8, 107 .pdiv = 8,`
H A D	soctherm.h	`77 u32 pdiv, pdiv_ate, pdiv_mask; member 89 u32 tall, tiddq_en, ten_count, pdiv, pdiv_ate, tsample, tsample_ate; member`
/openbmc/linux/drivers/gpu/drm/i915/display/
H A D	intel_dpll_mgr.c	1486 u32 pdiv; member 1511 params->pdiv = 0; in skl_wrpll_params_populate() 1514 params->pdiv = 1; in skl_wrpll_params_populate() 1517 params->pdiv = 2; in skl_wrpll_params_populate() 1520 params->pdiv = 4; in skl_wrpll_params_populate() 1728 DPLL_CFGCR2_PDIV(wrpll_params.pdiv) \| in skl_ddi_hdmi_pll_dividers() 2371 static void icl_wrpll_get_multipliers(int bestdiv, int pdiv, in icl_wrpll_get_multipliers() argument 2377 pdiv = 2; in icl_wrpll_get_multipliers() 2381 pdiv = 2; in icl_wrpll_get_multipliers() 2385 pdiv = 3; in icl_wrpll_get_multipliers() [all …]
/openbmc/u-boot/arch/arm/cpu/armv7/iproc-common/
H A D	armpll.c	`17 unsigned int pdiv; member 108 armpll_clk_tab[i].pdiv << in armpll_config()`
/openbmc/linux/drivers/clk/st/
H A D	clk-flexgen.c	`39 struct clk_divider pdiv; member 143 struct clk_hw pdiv_hw = &flexgen->pdiv.hw; in flexgen_recalc_rate() 159 struct clk_hw pdiv_hw = &flexgen->pdiv.hw; in flexgen_set_rate() 244 fgxbar->pdiv.lock = lock; in clk_register_flexgen() 245 fgxbar->pdiv.reg = reg + 0x58 + idx * 4; in clk_register_flexgen() 246 fgxbar->pdiv.width = 10; in clk_register_flexgen()`
/openbmc/linux/drivers/cpufreq/
H A D	brcmstb-avs-cpufreq.c	`341 static void brcm_avs_parse_p1(u32 p1, unsigned int mdiv_p0, unsigned int pdiv, in brcm_avs_parse_p1() argument 345 *pdiv = (p1 >> PDIV_SHIFT) & PDIV_MASK; in brcm_avs_parse_p1() 688 unsigned int ndiv, pdiv; in show_brcm_avs_pmap() local 694 brcm_avs_parse_p1(pmap.p1, &mdiv_p0, &pdiv, &ndiv); in show_brcm_avs_pmap() 698 pmap.p1, pmap.p2, ndiv, pdiv, mdiv_p0, mdiv_p1, mdiv_p2, in show_brcm_avs_pmap()`
/openbmc/qemu/hw/misc/
H A D	bcm2835_cprman.c	`75 uint64_t freq, ndiv, fdiv, pdiv; in pll_update() local 82 pdiv = FIELD_EX32(*pll->reg_a2w_ctrl, A2W_PLLx_CTRL, PDIV); in pll_update() 84 if (!pdiv) { in pll_update() 104 freq /= pdiv; in pll_update()`

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