Searched refs:pcsr (Results 1 – 14 of 14) sorted by relevance
49 uint16_t pcsr; member72 s->pcsr &= ~PCSR_PIF; in m5208_timer_write()77 s->pcsr = value; in m5208_timer_write()83 if (s->pcsr & PCSR_EN) in m5208_timer_write()86 s->pcsr = value; in m5208_timer_write()90 if (s->pcsr & PCSR_RLD) in m5208_timer_write()96 if (s->pcsr & PCSR_EN) in m5208_timer_write()103 s->pcsr &= ~PCSR_PIF; in m5208_timer_write()105 if (s->pcsr & PCSR_OVW) in m5208_timer_write()125 s->pcsr |= PCSR_PIF; in m5208_timer_trigger()[all …]
26 void __iomem *ioaddr = hw->pcsr; in dwmac1000_core_init()73 void __iomem *ioaddr = hw->pcsr; in dwmac1000_rx_ipc_enable()90 void __iomem *ioaddr = hw->pcsr; in dwmac1000_dump_regs()101 void __iomem *ioaddr = hw->pcsr; in dwmac1000_set_umac_addr()110 void __iomem *ioaddr = hw->pcsr; in dwmac1000_get_umac_addr()223 void __iomem *ioaddr = hw->pcsr; in dwmac1000_flow_ctrl()249 void __iomem *ioaddr = hw->pcsr; in dwmac1000_pmt()300 void __iomem *ioaddr = hw->pcsr; in dwmac1000_irq_status()347 void __iomem *ioaddr = hw->pcsr; in dwmac1000_set_eee_mode()363 void __iomem *ioaddr = hw->pcsr; in dwmac1000_reset_eee_mode()[all …]
27 void __iomem *ioaddr = hw->pcsr; in dwmac4_core_init()83 void __iomem *ioaddr = hw->pcsr; in dwmac4_rx_queue_enable()98 void __iomem *ioaddr = hw->pcsr; in dwmac4_rx_queue_priority()139 void __iomem *ioaddr = hw->pcsr; in dwmac4_tx_queue_priority()159 void __iomem *ioaddr = hw->pcsr; in dwmac4_rx_queue_routing()192 void __iomem *ioaddr = hw->pcsr; in dwmac4_prog_mtl_rx_algorithms()213 void __iomem *ioaddr = hw->pcsr; in dwmac4_prog_mtl_tx_algorithms()242 void __iomem *ioaddr = hw->pcsr; in dwmac4_set_mtl_tx_queue_weight()253 void __iomem *ioaddr = hw->pcsr; in dwmac4_map_mtl_dma()275 void __iomem *ioaddr = hw->pcsr; in dwmac4_config_cbs()[all …]
25 void __iomem *ioaddr = hw->pcsr; in dwmac100_core_init()39 void __iomem *ioaddr = hw->pcsr; in dwmac100_dump_mac_regs()66 void __iomem *ioaddr = hw->pcsr; in dwmac100_set_umac_addr()74 void __iomem *ioaddr = hw->pcsr; in dwmac100_get_umac_addr()131 void __iomem *ioaddr = hw->pcsr; in dwmac100_flow_ctrl()177 mac->pcsr = priv->ioaddr; in dwmac100_setup()
18 void __iomem *ioaddr = hw->pcsr; in dwxgmac2_core_init()69 void __iomem *ioaddr = hw->pcsr; in dwxgmac2_rx_ipc()85 void __iomem *ioaddr = hw->pcsr; in dwxgmac2_rx_queue_enable()99 void __iomem *ioaddr = hw->pcsr; in dwxgmac2_rx_queue_prio()140 void __iomem *ioaddr = hw->pcsr; in dwxgmac2_tx_queue_prio()157 void __iomem *ioaddr = hw->pcsr; in dwxgmac2_rx_queue_routing()187 void __iomem *ioaddr = hw->pcsr; in dwxgmac2_prog_mtl_rx_algorithms()209 void __iomem *ioaddr = hw->pcsr; in dwxgmac2_prog_mtl_tx_algorithms()248 void __iomem *ioaddr = hw->pcsr; in dwxgmac2_set_mtl_tx_queue_weight()1699 mac->pcsr = priv->ioaddr; in dwxgmac2_setup()[all …]
350 void __iomem *ioaddr = hw->pcsr; in sun8i_dwmac_dump_mac_regs()617 void __iomem *ioaddr = hw->pcsr; in sun8i_dwmac_core_init()649 void __iomem *ioaddr = hw->pcsr; in sun8i_dwmac_set_umac_addr()670 void __iomem *ioaddr = hw->pcsr; in sun8i_dwmac_get_umac_addr()679 void __iomem *ioaddr = hw->pcsr; in sun8i_dwmac_rx_ipc_enable()692 void __iomem *ioaddr = hw->pcsr; in sun8i_dwmac_set_filter()734 void __iomem *ioaddr = hw->pcsr; in sun8i_dwmac_flow_ctrl()1093 mac->pcsr = priv->ioaddr; in sun8i_dwmac_setup()
596 void __iomem *pcsr; /* vpointer to device CSRs */ member
197 ret = stmmac_rxp_config(priv, priv->hw->pcsr, priv->tc_entries, in tc_config_knode()215 return stmmac_rxp_config(priv, priv->hw->pcsr, priv->tc_entries, in tc_delete_knode()
311 void __iomem *ioaddr = priv->hw->pcsr; in intel_crosststamp()
131 timerp->pcsr = PIT_PCSR_OVW; in __udelay()134 timerp->pcsr |= PIT_PCSR_PRE(CONFIG_SYS_PIT_PRESCALE) | PIT_PCSR_EN; in __udelay()147 timerp->pcsr = PIT_PCSR_OVW; in timer_init()149 timerp->pcsr |= PIT_PCSR_PRE(CONFIG_SYS_PIT_PRESCALE) | PIT_PCSR_EN; in timer_init()
101 u16 pcsr; in pit_tick() local104 pcsr = __raw_readw(TA(MCFPIT_PCSR)); in pit_tick()105 __raw_writew(pcsr | MCFPIT_PCSR_PIF, TA(MCFPIT_PCSR)); in pit_tick()
44 u16 pcsr; /* 0x00 Control and Status Register */ member
66 unsigned int pcsr; /* 0x240 */ member
35 u32 pcsr; /* 0x18 Peripheral Clock Status Register */ member