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Searched refs:outl (Results 1 – 25 of 46) sorted by relevance

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/openbmc/u-boot/drivers/net/
H A Duli526x.c81 outl(data|CR9_SROM_READ|CR9_SRCS, ioaddr); \
83 outl(data|CR9_SROM_READ|CR9_SRCS|CR9_SRCLK, ioaddr); \
85 outl(data|CR9_SROM_READ|CR9_SRCS, ioaddr); \
344 outl(ULI526X_RESET, db->ioaddr + DCR0); in uli526x_disable()
351 outl(0, dev->iobase + DCR7); /* Disable Interrupt */ in uli526x_disable()
352 outl(inl(dev->iobase + DCR5), dev->iobase + DCR5); in uli526x_disable()
372 outl(ULI526X_RESET, db->ioaddr + DCR0); /* RESET MAC */ in uli526x_init()
374 outl(db->cr0_data, db->ioaddr + DCR0); in uli526x_init()
423 outl(db->cr7_data, db->ioaddr + DCR7); in uli526x_init()
426 outl(db->cr15_data, db->ioaddr + DCR15); in uli526x_init()
[all …]
H A Drtl8139.c340 outl(rtl8139_rx_config | rx_mode, ioaddr + RxConfig); in set_rx_mode()
342 outl(mc_filter[0], ioaddr + MAR0 + 0); in set_rx_mode()
343 outl(mc_filter[1], ioaddr + MAR0 + 4); in set_rx_mode()
367 outl((RX_FIFO_THRESH<<13) | (RX_BUF_LEN_IDX<<11) | (RX_DMA_BURST<<8), in rtl_reset()
369 outl((TX_DMA_BURST<<8)|0x03000000, ioaddr + TxConfig); in rtl_reset()
382 outl(phys_to_bus((int)rx_ring), ioaddr + RxBuf); in rtl_reset()
390 outl(rtl8139_rx_config, ioaddr + RxConfig); in rtl_reset()
393 outl(0, ioaddr + RxMissed); in rtl_reset()
422 outl(phys_to_bus((int)tx_buffer), ioaddr + TxAddr0 + cur_tx*4); in rtl_transmit()
423 outl(((TX_FIFO_THRESH<<11) & 0x003f0000) | len, in rtl_transmit()
/openbmc/u-boot/board/intel/galileo/
H A Dgalileo.c33 outl(val, port); in board_assert_perst()
39 outl(val, port); in board_assert_perst()
45 outl(val, port); in board_assert_perst()
60 outl(val, port); in board_deassert_perst()
/openbmc/u-boot/arch/sh/cpu/sh4/
H A Dwatchdog.c23 outl((unsigned short)value | 0x5A00, WDT_BASE + 0x00); in cnt_write()
28 outl((unsigned short)value | 0xA500, WDT_BASE + 0x04); in csr_write()
33 outl(0x55000000, WDT_BASE + 0x08); in watchdog_reset()
H A Dcache.c28 outl(data, addr); in cache_wback_all()
48 outl(CCR_CACHE_STOP, CCR); in cache_control()
50 outl(CCR_CACHE_INIT, CCR); in cache_control()
/openbmc/u-boot/arch/x86/cpu/
H A Dpci.c22 outl(bdf | (offset & 0xfc) | PCI_CFG_EN, PCI_REG_ADDR); in pci_x86_read_config()
41 outl(bdf | (offset & 0xfc) | PCI_CFG_EN, PCI_REG_ADDR); in pci_x86_write_config()
50 outl(value, PCI_REG_DATA); in pci_x86_write_config()
/openbmc/u-boot/arch/x86/cpu/broadwell/
H A Dpinctrl_broadwell.c176 outl(val, &regs->config[gpio].conf_a); in broadwell_pinctrl_commit()
177 outl(pin->sense_disable << CONFB_SENSE_SHIFT, in broadwell_pinctrl_commit()
199 outl(owner_gpio[set], &regs->own[set]); in broadwell_pinctrl_commit()
200 outl(route_smi[set], &regs->gpi_route[set]); in broadwell_pinctrl_commit()
201 outl(irq_enable[set], &regs->gpi_ie[set]); in broadwell_pinctrl_commit()
202 outl(reset_rsmrst[set], &regs->rst_sel[set]); in broadwell_pinctrl_commit()
205 outl(pirq2apic, &regs->pirq_to_ioxapic); in broadwell_pinctrl_commit()
H A Dpch.c135 outl(set1, ACPI_BASE_ADDRESS + GPE0_EN(GPE_31_0)); in enable_all_gpe()
136 outl(set2, ACPI_BASE_ADDRESS + GPE0_EN(GPE_63_32)); in enable_all_gpe()
137 outl(set3, ACPI_BASE_ADDRESS + GPE0_EN(GPE_94_64)); in enable_all_gpe()
138 outl(set4, ACPI_BASE_ADDRESS + GPE0_EN(GPE_STD)); in enable_all_gpe()
H A Dpower_state.c35 outl(ps->pm1_cnt & ~(SLP_TYP), ACPI_BASE_ADDRESS + PM1_CNT); in prev_sleep_state()
/openbmc/u-boot/arch/x86/include/asm/arch-quark/
H A Dquark.h211 outl(dev | offset | PCI_CFG_EN, PCI_REG_ADDR); in qrk_pci_read_config_dword()
227 outl(dev | offset | PCI_CFG_EN, PCI_REG_ADDR); in qrk_pci_write_config_dword()
228 outl(value, PCI_REG_DATA); in qrk_pci_write_config_dword()
/openbmc/u-boot/arch/microblaze/include/asm/
H A Dio.h51 #define outl(x, addr) ((void)writel(x, addr)) macro
60 #define out_be32(addr, x) outl(x, addr)
67 #define outl_p(val, port) outl((val), (port))
126 outl(*p++, port); in io_outsl()
/openbmc/u-boot/board/renesas/ecovec/
H A Decovec.c47 outl(inl(MSTPCR2) & ~0x10000000, MSTPCR2); in board_late_init()
89 outl(inl(MSTPCR2) & ~0x100000, MSTPCR2); in board_init()
/openbmc/u-boot/drivers/gpio/
H A Dintel_ich6_gpio.c71 outl(val, bank->lvl); in _ich6_gpio_set_value()
85 outl(val, base); in _ich6_gpio_set_direction()
89 outl(val, base); in _ich6_gpio_set_direction()
/openbmc/u-boot/board/renesas/ap325rxa/
H A Dap325rxa.c94 outl(MSTPCR2_D, MSTPCR2); in board_init()
122 outl(PRPRICR5_D, PRPRICR5); in board_init()
/openbmc/qemu/tests/multiboot/
H A Dstart.S43 outl %eax, $0xf4
H A Daout_kludge.S125 outl %eax, $0xf4
/openbmc/qemu/pc-bios/optionrom/
H A Doptionrom.h90 outl %eax, (%dx)
104 outl %eax, (%dx) /* Initiate DMA */
H A Doptrom_fw_cfg.h64 outl(cpu_to_be32((uint32_t)&access), BIOS_CFG_DMA_ADDR_LOW); in bios_cfg_read_entry_dma()
H A Doptrom.h48 static inline void outl(uint32_t value, uint16_t port) in outl() function
/openbmc/u-boot/arch/xtensa/include/asm/
H A Dio.h64 #define outl(val, port) writel((val), (u32 *)((unsigned long)(port))) macro
71 #define outl_p(val, port) outl((val), (port))
/openbmc/u-boot/cmd/
H A Dio.c62 outl((u32) val, addr); in do_io_iow()
/openbmc/u-boot/arch/sh/include/asm/
H A Dio.h86 #define outl(v, p) __raw_writel(cpu_to_le32(v), p) macro
102 #define outl_p(val, port) outl((val), (port))
117 #define out_le32(port, val) outl(val, port)
/openbmc/u-boot/arch/nios2/include/asm/
H A Dio.h78 #define outl(val, addr) writel(val,addr) macro
110 while (count--) outl (*p++, port); in outsl()
/openbmc/u-boot/arch/x86/cpu/qemu/
H A Dqemu.c49 outl(cpu_to_be32((uintptr_t)dma), FW_DMA_PORT_HIGH); in qemu_x86_fwcfg_read_entry_dma()
/openbmc/u-boot/arch/sandbox/lib/
H A Dpci_io.c124 void outl(unsigned int value, unsigned int addr) in outl() function

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