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Searched refs:nv04_display (Results 1 – 11 of 11) sorted by relevance

/openbmc/linux/drivers/gpu/drm/nouveau/dispnv04/
H A Ddisp.c60 struct nv04_display *disp = nv04_display(dev); in nv04_display_fini()
101 struct nv04_display *disp = nv04_display(dev); in nv04_display_init()
191 struct nv04_display *disp = nv04_display(dev); in nv04_display_destroy()
223 struct nv04_display *disp; in nv04_display_create()
H A Ddfp.c95 struct nv04_crtc_reg *crtcstate = nv04_display(dev)->mode_reg.crtc_reg; in nv04_dfp_disable()
122 fpc = &nv04_display(dev)->mode_reg.crtc_reg[nv_crtc->index].fp_control; in nv04_dfp_update_fp_control()
137 fpc = &nv04_display(dev)->mode_reg.crtc_reg[nv_crtc->index].fp_control; in nv04_dfp_update_fp_control()
207 struct nv04_mode_state *state = &nv04_display(dev)->mode_reg; in nv04_dfp_prepare_sel_clk()
238 int shift = (nv04_display(dev)->saved_reg.sel_clk & 0x50) ? 0 : 1; in nv04_dfp_prepare_sel_clk()
251 struct nv04_crtc_reg *crtcstate = nv04_display(dev)->mode_reg.crtc_reg; in nv04_dfp_prepare()
464 nv04_display(dev)->mode_reg.crtc_reg[head].fp_control = in nv04_dfp_commit()
556 nv04_display(dev)->mode_reg.sel_clk = NVReadRAMDAC(dev, 0, NV_PRAMDAC_SEL_CLK); in nv04_lvds_dpms()
557 nv04_display(dev)->mode_reg.sel_clk &= ~0xf0; in nv04_lvds_dpms()
559 NVWriteRAMDAC(dev, 0, NV_PRAMDAC_SEL_CLK, nv04_display(dev)->mode_reg.sel_clk); in nv04_lvds_dpms()
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H A Dcrtc.c67 struct nv04_crtc_reg *regp = &nv04_display(dev)->mode_reg.crtc_reg[nv_crtc->index]; in nv_crtc_set_digital_vibrance()
124 struct nv04_mode_state *state = &nv04_display(dev)->mode_reg; in nv_crtc_calc_state_ext()
612 struct nv04_display *disp = nv04_display(crtc->dev); in nv_crtc_swap_fbs()
669 struct nv04_mode_state *state = &nv04_display(dev)->mode_reg; in nv_crtc_save()
671 struct nv04_mode_state *saved = &nv04_display(dev)->saved_reg; in nv_crtc_save()
696 nouveau_hw_load_state(crtc->dev, head, &nv04_display(dev)->saved_reg); in nv_crtc_restore()
731 nouveau_hw_load_state(dev, nv_crtc->index, &nv04_display(dev)->mode_reg); in nv_crtc_commit()
749 struct nv04_display *disp = nv04_display(crtc->dev); in nv_crtc_destroy()
795 struct nv04_display *disp = nv04_display(crtc->dev); in nv_crtc_disable()
1078 struct nv04_display *disp = container_of(event, typeof(*disp), flip); in nv04_flip_complete()
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H A Ddisp.h83 struct nv04_display { struct
93 static inline struct nv04_display * argument
94 nv04_display(struct drm_device *dev) in nv04_display() function
H A Dtvnv04.c79 struct nv04_mode_state *state = &nv04_display(dev)->mode_reg; in nv04_tv_dpms()
107 struct nv04_crtc_reg *state = &nv04_display(dev)->mode_reg.crtc_reg[head]; in nv04_tv_bind()
146 struct nv04_crtc_reg *regp = &nv04_display(dev)->mode_reg.crtc_reg[nv_crtc->index]; in nv04_tv_mode_set()
H A Dcursor.c42 struct nv04_crtc_reg *regp = &nv04_display(dev)->mode_reg.crtc_reg[nv_crtc->index]; in nv04_cursor_set_offset()
H A Ddac.c432 uint32_t *dac_users = &nv04_display(dev)->dac_users[ffs(dcb->or) - 1]; in nv04_dac_update_dacclk()
457 (nv04_display(dev)->dac_users[ffs(dcb->or) - 1] & ~(1 << dcb->index)); in nv04_dac_in_use()
H A Dtvnv17.c410 uint8_t *cr_lcd = &nv04_display(dev)->mode_reg.crtc_reg[head].CRTC[ in nv17_tv_prepare()
471 struct nv04_crtc_reg *regs = &nv04_display(dev)->mode_reg.crtc_reg[head]; in nv17_tv_mode_set()
H A Dhw.h376 &nv04_display(dev)->mode_reg.crtc_reg[head].CRTC[NV_CIO_CRE_HCUR_ADDR1_INDEX]; in nv_show_cursor()
H A Dhw.c300 nv04_display(dev)->saved_vga_font[plane][i] = in nouveau_vga_font_io()
303 iowrite32_native(nv04_display(dev)->saved_vga_font[plane][i], in nouveau_vga_font_io()
H A Dtvmodesnv17.c546 struct nv04_crtc_reg *regs = &nv04_display(dev)->mode_reg.crtc_reg[head]; in nv17_ctv_update_rescaler()