| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dce80/ |
| H A D | dce80_resource.c | 380 .num_ddc = 6,
388 .num_ddc = 6,
396 .num_ddc = 2,
829 for (i = 0; i < pool->base.res_cap->num_ddc; i++) { in dce80_resource_destruct()
1087 for (i = 0; i < pool->base.res_cap->num_ddc; i++) { in dce80_construct()
1287 for (i = 0; i < pool->base.res_cap->num_ddc; i++) { in dce81_construct()
1484 for (i = 0; i < pool->base.res_cap->num_ddc; i++) { in dce83_construct()
|
| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dce60/ |
| H A D | dce60_resource.c | 377 .num_ddc = 6,
385 .num_ddc = 6,
393 .num_ddc = 2,
822 for (i = 0; i < pool->base.res_cap->num_ddc; i++) { in dce60_resource_destruct()
1073 for (i = 0; i < pool->base.res_cap->num_ddc; i++) { in dce60_construct()
1271 for (i = 0; i < pool->base.res_cap->num_ddc; i++) { in dce61_construct()
1465 for (i = 0; i < pool->base.res_cap->num_ddc; i++) { in dce64_construct()
|
| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn21/ |
| H A D | dcn21_resource.c | 579 .num_ddc = 5,
593 .num_ddc = 4,
605 .num_ddc = 4,
720 for (i = 0; i < pool->base.res_cap->num_ddc; i++) { in dcn21_resource_destruct()
1642 for (i = 0; i < pool->base.res_cap->num_ddc; i++) { in dcn21_resource_construct()
|
| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dce112/ |
| H A D | dce112_resource.c | 397 .num_ddc = 6,
405 .num_ddc = 5,
802 for (i = 0; i < pool->base.res_cap->num_ddc; i++) { in dce112_resource_destruct()
1374 for (i = 0; i < pool->base.res_cap->num_ddc; i++) { in dce112_resource_construct()
|
| /openbmc/linux/drivers/gpu/drm/amd/display/dc/inc/ |
| H A D | resource.h | 52 int num_ddc; member
|
| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dce100/ |
| H A D | dce100_resource.c | 379 .num_ddc = 6,
781 for (i = 0; i < pool->base.res_cap->num_ddc; i++) { in dce100_resource_destruct()
1125 for (i = 0; i < pool->base.res_cap->num_ddc; i++) { in dce100_resource_construct()
|
| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dce110/ |
| H A D | dce110_resource.c | 390 .num_ddc = 3,
399 .num_ddc = 3,
837 for (i = 0; i < pool->base.res_cap->num_ddc; i++) { in dce110_resource_destruct()
1485 for (i = 0; i < pool->base.res_cap->num_ddc; i++) { in dce110_resource_construct()
|
| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn10/ |
| H A D | dcn10_resource.c | 492 .num_ddc = 4,
502 .num_ddc = 4,
951 for (i = 0; i < pool->base.res_cap->num_ddc; i++) { in dcn10_resource_destruct()
1606 for (i = 0; i < pool->base.res_cap->num_ddc; i++) { in dcn10_resource_construct()
|
| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dce120/ |
| H A D | dce120_resource.c | 502 .num_ddc = 6,
625 for (i = 0; i < pool->base.res_cap->num_ddc; i++) { in dce120_resource_destruct()
1217 for (i = 0; i < pool->base.res_cap->num_ddc; i++) { in dce120_resource_construct()
|
| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn302/ |
| H A D | dcn302_resource.c | 126 .num_ddc = 5,
1034 for (i = 0; i < pool->res_cap->num_ddc; i++) { in dcn302_resource_destruct()
1450 for (i = 0; i < pool->res_cap->num_ddc; i++) { in dcn302_resource_construct()
|
| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn303/ |
| H A D | dcn303_resource.c | 105 .num_ddc = 2,
960 for (i = 0; i < pool->res_cap->num_ddc; i++) { in dcn303_resource_destruct()
1362 for (i = 0; i < pool->res_cap->num_ddc; i++) { in dcn303_resource_construct()
|
| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn301/ |
| H A D | dcn301_resource.c | 646 .num_ddc = 4,
1082 for (i = 0; i < pool->base.res_cap->num_ddc; i++) { in dcn301_destruct()
1666 for (i = 0; i < pool->base.res_cap->num_ddc; i++) { in dcn301_resource_construct()
|
| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn201/ |
| H A D | dcn201_resource.c | 569 .num_ddc = 2,
1232 for (i = 0; i < pool->base.res_cap->num_ddc; i++) { in dcn201_resource_construct()
|
| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dce/ |
| H A D | dce_i2c_hw.c | 407 if (line < pool->res_cap->num_ddc) in acquire_i2c_hw_engine()
|
| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn316/ |
| H A D | dcn316_resource.c | 819 .num_ddc = 5,
1412 for (i = 0; i < pool->base.res_cap->num_ddc; i++) { in dcn316_resource_destruct()
1978 for (i = 0; i < pool->base.res_cap->num_ddc; i++) { in dcn316_resource_construct()
|
| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn315/ |
| H A D | dcn315_resource.c | 822 .num_ddc = 5,
1414 for (i = 0; i < pool->base.res_cap->num_ddc; i++) { in dcn315_resource_destruct()
2091 for (i = 0; i < pool->base.res_cap->num_ddc; i++) { in dcn315_resource_construct()
|
| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn321/ |
| H A D | dcn321_resource.c | 650 .num_ddc = 5,
1399 for (i = 0; i < pool->base.res_cap->num_ddc; i++) { in dcn321_resource_destruct()
1951 for (i = 0; i < pool->base.res_cap->num_ddc; i++) { in dcn321_resource_construct()
|
| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn314/ |
| H A D | dcn314_resource.c | 834 .num_ddc = 5,
1486 for (i = 0; i < pool->base.res_cap->num_ddc; i++) { in dcn314_resource_destruct()
2116 for (i = 0; i < pool->base.res_cap->num_ddc; i++) { in dcn314_resource_construct()
|
| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn20/ |
| H A D | dcn20_resource.c | 666 .num_ddc = 6,
704 .num_ddc = 5,
1126 for (i = 0; i < pool->base.res_cap->num_ddc; i++) { in dcn20_resource_destruct()
2635 for (i = 0; i < pool->base.res_cap->num_ddc; i++) { in dcn20_resource_construct()
|
| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn31/ |
| H A D | dcn31_resource.c | 823 .num_ddc = 5,
1414 for (i = 0; i < pool->base.res_cap->num_ddc; i++) { in dcn31_resource_destruct()
2150 for (i = 0; i < pool->base.res_cap->num_ddc; i++) { in dcn31_resource_construct()
|
| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn30/ |
| H A D | dcn30_resource.c | 675 .num_ddc = 6,
1112 for (i = 0; i < pool->base.res_cap->num_ddc; i++) { in dcn30_resource_destruct()
2538 for (i = 0; i < pool->base.res_cap->num_ddc; i++) { in dcn30_resource_construct()
|
| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn32/ |
| H A D | dcn32_resource.c | 651 .num_ddc = 5,
1414 for (i = 0; i < pool->base.res_cap->num_ddc; i++) { in dcn32_resource_destruct()
2418 for (i = 0; i < pool->base.res_cap->num_ddc; i++) { in dcn32_resource_construct()
|