| /openbmc/u-boot/include/linux/ |
| H A D | log2.h | 27 int __ilog2_u32(u32 n) in __ilog2_u32() argument
29 return fls(n) - 1; in __ilog2_u32()
35 int __ilog2_u64(u64 n) in __ilog2_u64() argument
37 return fls64(n) - 1; in __ilog2_u64()
50 bool is_power_of_2(unsigned long n) in is_power_of_2() argument
52 return (n != 0 && ((n & (n - 1)) == 0)); in is_power_of_2()
60 unsigned long __roundup_pow_of_two(unsigned long n) in __roundup_pow_of_two() argument
62 return 1UL << fls_long(n - 1); in __roundup_pow_of_two()
70 unsigned long __rounddown_pow_of_two(unsigned long n) in __rounddown_pow_of_two() argument
72 return 1UL << (fls_long(n) - 1); in __rounddown_pow_of_two()
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| /openbmc/openbmc/poky/bitbake/lib/toaster/toastergui/static/css/ |
| H A D | bootstrap.css.map | 1 …n * Bootstrap v3.3.6 (http://getbootstrap.com)\n * Copyright 2011-2015 Twitter, Inc.\n * Licensed …
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| /openbmc/openbmc/meta-openembedded/meta-oe/recipes-graphics/xscreensaver/files/ |
| H A D | 0001-Tweak-app-defaults.patch | 50 - maze -root \n\
51 -@GL_KLUDGE@ GL: superquadrics -root \n\
52 - attraction -root \n\
53 - blitspin -root \n\
54 - greynetic -root \n\
55 - helix -root \n\
56 - hopalong -root \n\
57 - imsmap -root \n\
58 -- noseguy -root \n\
59 -- pyro -root \n\
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| /openbmc/openbmc/meta-openembedded/meta-gnome/recipes-gnome/evolution-data-server/evolution-data-server/ |
| H A D | 0003-contact-Replace-the-Novell-sample-contact-with-somet.patch | 19 "BEGIN:VCARD\n" \
20 -"X-EVOLUTION-FILE-AS:Novell Ximian Group\n" \
21 -"ADR;TYPE=WORK:;Suite 500;8 Cambridge Center;Cambridge;MA;02142;USA\n" \
22 -"LABEL;TYPE=WORK:8 Cambridge Center, Suite 500\\nCambridge\\, MA\\n02142\\nUSA\n" \
23 -"TEL;WORK;VOICE:(617) 613-2000\n" \
24 -"TEL;WORK;FAX:(617) 613-2001\n" \
25 -"EMAIL;INTERNET:hello@ximian.com\n" \
26 -"URL:http://www.ximian.com/\n" \
27 -"ORG:Novell;Ximian Group\n" \
28 -"PHOTO;ENCODING=b;TYPE=JPEG:/9j/4AAQSkZJRgABAQEARwBHAAD//gAXQ3JlYXRlZCB3aXRo\n" \
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| /openbmc/u-boot/tools/omap/ |
| H A D | clocks_get_m_n.c | 53 u32 m, n; in get_m_n_optimized() local
54 n = 1; in get_m_n_optimized()
56 m = target_freq_khz / ref_freq_khz / 2 * n; in get_m_n_optimized()
59 freq = ref_freq_khz * 2 * m / n; in get_m_n_optimized()
71 n_optimal = n; in get_m_n_optimized()
73 n++; in get_m_n_optimized()
75 ((ref_freq_khz / n) < 1000)) { in get_m_n_optimized()
79 n--; in get_m_n_optimized()
89 u32 m, n; in main() local
91 get_m_n_optimized(2000000, 12000, &m, &n); in main()
[all …]
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| /openbmc/u-boot/arch/mips/mach-jz47xx/include/mach/ |
| H A D | jz4780.h | 36 #define GPIO_PXPIN(n) (0x00 + (n) * 0x100) argument
37 #define GPIO_PXINT(n) (0x10 + (n) * 0x100) argument
38 #define GPIO_PXINTS(n) (0x14 + (n) * 0x100) argument
39 #define GPIO_PXINTC(n) (0x18 + (n) * 0x100) argument
40 #define GPIO_PXMASK(n) (0x20 + (n) * 0x100) argument
41 #define GPIO_PXMASKS(n) (0x24 + (n) * 0x100) argument
42 #define GPIO_PXMASKC(n) (0x28 + (n) * 0x100) argument
43 #define GPIO_PXPAT1(n) (0x30 + (n) * 0x100) argument
44 #define GPIO_PXPAT1S(n) (0x34 + (n) * 0x100) argument
45 #define GPIO_PXPAT1C(n) (0x38 + (n) * 0x100) argument
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| /openbmc/qemu/tests/tcg/hexagon/ |
| H A D | mem_noshuf.c | 200 Memory n; in main() local
207 n.w[0] = ~0; in main()
208 res32 = mem_noshuf_sb_lb(&n.b[0], &n.b[0], 0x87); in main()
211 n.w[0] = ~0; in main()
212 res32 = mem_noshuf_sb_lub(&n.b[0], &n.ub[0], 0x87); in main()
215 n.w[0] = ~0; in main()
216 res32 = mem_noshuf_sb_lh(&n.b[0], &n.h[0], 0x87); in main()
219 n.w[0] = ~0; in main()
220 res32 = mem_noshuf_sb_luh(&n.b[0], &n.uh[0], 0x87); in main()
223 n.w[0] = ~0; in main()
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| /openbmc/u-boot/arch/arm/include/asm/arch-sunxi/ |
| H A D | prcm.h | 15 #define __PRCM_CPUS_CFG_PRE(n) (((n) & 0x3) << 4) argument
17 #define __PRCM_CPUS_CFG_PRE_DIV(n) (((n) >> 1) - 1) argument
18 #define PRCM_CPUS_CFG_PRE_DIV(n) \ argument
19 __PRCM_CPUS_CFG_PRE(__PRCM_CPUS_CFG_CLK_PRE(n))
20 #define __PRCM_CPUS_CFG_POST(n) (((n) & 0x1f) << 8) argument
22 #define __PRCM_CPUS_CFG_POST_DIV(n) ((n) - 1) argument
23 #define PRCM_CPUS_CFG_POST_DIV(n) \ argument
24 __PRCM_CPUS_CFG_POST_DIV(__PRCM_CPUS_CFG_POST_DIV(n))
25 #define __PRCM_CPUS_CFG_CLK_SRC(n) (((n) & 0x3) << 16) argument
40 #define __PRCM_APB0_RATIO(n) (((n) & 0x3) << 0) argument
[all …]
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| H A D | p2wi.h | 24 #define __P2WI_CC_CLK(n) (((n) & 0xff) << 0) argument
26 #define __P2WI_CC_CLK_DIV(n) (((n) >> 1) - 1) argument
27 #define P2WI_CC_CLK_DIV(n) \ argument
28 __P2WI_CC_CLK(__P2WI_CC_CLK_DIV(n))
29 #define P2WI_CC_SDA_OUT_DELAY(n) (((n) & 0x7) << 8) argument
39 #define __P2WI_STAT_TRANS_ERR(n) (((n) & 0xff) << 8) argument
66 #define P2WI_DATADDR_BYTE_1(n) (((n) & 0xff) << 0) argument
68 #define P2WI_DATADDR_BYTE_2(n) (((n) & 0xff) << 8) argument
70 #define P2WI_DATADDR_BYTE_3(n) (((n) & 0xff) << 16) argument
72 #define P2WI_DATADDR_BYTE_4(n) (((n) & 0xff) << 24) argument
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| H A D | dram_sun4i.h | 107 #define DRAM_DCR_IO_WIDTH(n) (((n) & 0x3) << 1) argument
111 #define DRAM_DCR_CHIP_DENSITY(n) (((n) & 0x7) << 3) argument
119 #define DRAM_DCR_BUS_WIDTH(n) (((n) & 0x7) << 6) argument
124 #define DRAM_DCR_RANK_SEL(n) (((n) & 0x3) << 10) argument
127 #define DRAM_DCR_MODE(n) (((n) & 0x3) << 13) argument
136 #define DRAM_DRR_TRFC(n) ((n) & 0xff) argument
137 #define DRAM_DRR_TREFI(n) (((n) & 0xffff) << 8) argument
138 #define DRAM_DRR_BURST(n) ((((n) - 1) & 0xf) << 24) argument
140 #define DRAM_MCR_MODE_NORM(n) (((n) & 0x3) << 0) argument
142 #define DRAM_MCR_MODE_DQ_OUT(n) (((n) & 0x3) << 2) argument
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| /openbmc/qemu/configs/devices/arm-softmmu/ |
| H A D | default.mak | 4 # CONFIG_I2C_DEVICES=n
5 # CONFIG_PCI_DEVICES=n
6 # CONFIG_TEST_DEVICES=n
9 # CONFIG_ARM_VIRT=n
13 # CONFIG_CUBIEBOARD=n
14 # CONFIG_EXYNOS4=n
15 # CONFIG_HIGHBANK=n
16 # CONFIG_INTEGRATOR=n
17 # CONFIG_FSL_IMX31=n
18 # CONFIG_MUSICPAL=n
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| /openbmc/qemu/roms/ |
| H A D | config.seabios-128k | 5 CONFIG_ATA_DMA=n
6 CONFIG_XEN=n
7 CONFIG_ATA_PIO32=n
8 CONFIG_AHCI=n
9 CONFIG_SDCARD=n
10 CONFIG_VIRTIO_BLK=n
11 CONFIG_VIRTIO_SCSI=n
12 CONFIG_PVSCSI=n
13 CONFIG_ESP_SCSI=n
14 CONFIG_LSI_SCSI=n
[all …]
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| H A D | config.seabios-microvm | 5 CONFIG_XEN=n
6 CONFIG_BOOTSPLASH=n
7 CONFIG_ATA=n
8 CONFIG_AHCI=n
9 CONFIG_SDCARD=n
10 CONFIG_PVSCSI=n
11 CONFIG_ESP_SCSI=n
12 CONFIG_LSI_SCSI=n
13 CONFIG_MEGASAS=n
14 CONFIG_MPT_SCSI=n
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| /openbmc/u-boot/arch/arm/include/asm/arch-lpc32xx/ |
| H A D | timer.h | 28 #define TIMER_IR_CR(n) (1 << ((n) + 4)) argument
29 #define TIMER_IR_MR(n) (1 << (n)) argument
37 #define TIMER_MCR_STOP(n) (1 << (3 * (n) + 2)) argument
38 #define TIMER_MCR_RESET(n) (1 << (3 * (n) + 1)) argument
39 #define TIMER_MCR_INTERRUPT(n) (1 << (3 * (n))) argument
42 #define TIMER_CCR_INTERRUPT(n) (1 << (3 * (n) + 2)) argument
43 #define TIMER_CCR_FALLING_EDGE(n) (1 << (3 * (n) + 1)) argument
44 #define TIMER_CCR_RISING_EDGE(n) (1 << (3 * (n))) argument
47 #define TIMER_EMR_EMC_TOGGLE(n) (0x3 << (2 * (n) + 4)) argument
48 #define TIMER_EMR_EMC_SET(n) (0x2 << (2 * (n) + 4)) argument
[all …]
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| /openbmc/qemu/configs/devices/i386-softmmu/ |
| H A D | default.mak | 5 #CONFIG_AMD_IOMMU=n
6 #CONFIG_APPLESMC=n
7 #CONFIG_FDC=n
8 #CONFIG_HPET=n
9 #CONFIG_HYPERV=n
10 #CONFIG_ISA_DEBUG=n
11 #CONFIG_ISA_IPMI_BT=n
12 #CONFIG_ISA_IPMI_KCS=n
13 #CONFIG_PCI_IPMI_KCS=n
14 #CONFIG_PCI_IPMI_BT=n
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| /openbmc/qemu/host/include/loongarch64/host/ |
| H A D | bufferiszero.c.inc | 20 asm("vld $vr0,%2,0\n\t" /* first: buf + 0 */
21 "vld $vr1,%4,-16\n\t" /* last: buf + len - 16 */
22 "vld $vr2,%3,0\n\t" /* e[0] */
23 "vld $vr3,%3,16\n\t" /* e[1] */
24 "vld $vr4,%3,32\n\t" /* e[2] */
25 "vld $vr5,%3,48\n\t" /* e[3] */
26 "vld $vr6,%3,64\n\t" /* e[4] */
27 "vld $vr7,%3,80\n\t" /* e[5] */
28 "vld $vr8,%3,96\n\t" /* e[6] */
29 "vor.v $vr0,$vr0,$vr1\n\t"
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| /openbmc/openbmc/meta-google/recipes-core/busybox/files/ |
| H A D | gbmc.cfg | 2 CONFIG_IP=n
3 CONFIG_NETSTAT=n
31 CONFIG_BUNZIP2=n
32 CONFIG_BZIP2=n
33 CONFIG_UNZIP=n
34 CONFIG_ADDGROUP=n
35 CONFIG_ADDUSER=n
36 CONFIG_DELGROUP=n
37 CONFIG_DELUSER=n
38 CONFIG_LOGIN=n
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| /openbmc/qemu/target/hexagon/ |
| H A D | gdbstub.c | 23 int hexagon_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n) in hexagon_gdb_read_register() argument
27 if (n == HEX_REG_P3_0_ALIASED) { in hexagon_gdb_read_register()
35 if (n < TOTAL_PER_THREAD_REGS) { in hexagon_gdb_read_register()
36 return gdb_get_regl(mem_buf, env->gpr[n]); in hexagon_gdb_read_register()
39 n -= TOTAL_PER_THREAD_REGS; in hexagon_gdb_read_register()
41 if (n < NUM_PREGS) { in hexagon_gdb_read_register()
42 return gdb_get_reg8(mem_buf, env->pred[n]); in hexagon_gdb_read_register()
45 n -= NUM_PREGS; in hexagon_gdb_read_register()
50 int hexagon_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n) in hexagon_gdb_write_register() argument
54 if (n == HEX_REG_P3_0_ALIASED) { in hexagon_gdb_write_register()
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| /openbmc/qemu/hw/net/ |
| H A D | virtio-net.c | 117 VirtIONet *n = qemu_get_nic_opaque(nc); in virtio_net_get_subqueue() local
119 return &n->vqs[nc->queue_index]; in virtio_net_get_subqueue()
143 VirtIONet *n = VIRTIO_NET(vdev); in virtio_net_get_config() local
145 NetClientState *nc = qemu_get_queue(n->nic); in virtio_net_get_config()
150 virtio_stw_p(vdev, &netcfg.status, n->status); in virtio_net_get_config()
151 virtio_stw_p(vdev, &netcfg.max_virtqueue_pairs, n->max_queue_pairs); in virtio_net_get_config()
152 virtio_stw_p(vdev, &netcfg.mtu, n->net_conf.mtu); in virtio_net_get_config()
153 memcpy(netcfg.mac, n->mac, ETH_ALEN); in virtio_net_get_config()
154 virtio_stl_p(vdev, &netcfg.speed, n->net_conf.speed); in virtio_net_get_config()
155 netcfg.duplex = n->net_conf.duplex; in virtio_net_get_config()
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| /openbmc/qemu/target/loongarch/ |
| H A D | gdbstub.c | 34 int loongarch_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n) in loongarch_cpu_gdb_read_register() argument
38 if (0 <= n && n <= 34) { in loongarch_cpu_gdb_read_register()
41 if (n < 32) { in loongarch_cpu_gdb_read_register()
42 val = env->gpr[n]; in loongarch_cpu_gdb_read_register()
43 } else if (n == 32) { in loongarch_cpu_gdb_read_register()
46 } else if (n == 33) { in loongarch_cpu_gdb_read_register()
62 int loongarch_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n) in loongarch_cpu_gdb_write_register() argument
68 if (n < 0 || n > 34) { in loongarch_cpu_gdb_write_register()
80 if (0 <= n && n < 32) { in loongarch_cpu_gdb_write_register()
81 env->gpr[n] = tmp; in loongarch_cpu_gdb_write_register()
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| /openbmc/u-boot/drivers/usb/dwc3/ |
| H A D | core.h | 99 #define DWC3_GUSB2PHYCFG(n) (0xc200 + (n * 0x04)) argument
100 #define DWC3_GUSB2I2CCTL(n) (0xc240 + (n * 0x04)) argument
102 #define DWC3_GUSB2PHYACC(n) (0xc280 + (n * 0x04)) argument
104 #define DWC3_GUSB3PIPECTL(n) (0xc2c0 + (n * 0x04)) argument
106 #define DWC3_GTXFIFOSIZ(n) (0xc300 + (n * 0x04)) argument
107 #define DWC3_GRXFIFOSIZ(n) (0xc380 + (n * 0x04)) argument
109 #define DWC3_GEVNTADRLO(n) (0xc400 + (n * 0x10)) argument
110 #define DWC3_GEVNTADRHI(n) (0xc404 + (n * 0x10)) argument
111 #define DWC3_GEVNTSIZ(n) (0xc408 + (n * 0x10)) argument
112 #define DWC3_GEVNTCOUNT(n) (0xc40c + (n * 0x10)) argument
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| /openbmc/qemu/scripts/coccinelle/ |
| H A D | use-g_new-etc.cocci | 24 expression n;
26 -g_malloc(sizeof(T) * (n))
27 +g_new(T, n)
30 expression n;
32 -g_try_malloc(sizeof(T) * (n))
33 +g_try_new(T, n)
36 expression n;
38 -g_malloc0(sizeof(T) * (n))
39 +g_new0(T, n)
42 expression n;
[all …]
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| /openbmc/qemu/tests/unit/ |
| H A D | test-aio.c | 26 int n; member
43 int n; member
50 int n; member
59 if (++data->n < data->max) { in bh_test_cb()
67 if (++data->n < data->max) { in timer_test_cb()
80 if (++data->n < data->max) { in bh_delete_cb()
92 data->n++; in event_ready_cb()
111 BHTestData data = { .n = 0 }; in test_bh_schedule()
115 g_assert_cmpint(data.n, ==, 0); in test_bh_schedule()
118 g_assert_cmpint(data.n, ==, 1); in test_bh_schedule()
[all …]
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| /openbmc/openbmc/meta-openembedded/meta-oe/recipes-support/hddtemp/hddtemp/ |
| H A D | hddtemp_0.3-beta15-52.diff | 88 "Project-Id-Version: fr\n"
89 -"Report-Msgid-Bugs-To: hddtemp@guzu.net\n"
90 -"POT-Creation-Date: 2005-02-25 22:43+0100\n"
91 -"PO-Revision-Date: 2003-06-03 00:58GMT+1\n"
92 +"Report-Msgid-Bugs-To: \n"
93 +"POT-Creation-Date: 2006-06-29 16:24+0200\n"
94 +"PO-Revision-Date: 2011-08-30 16:38+0200\n"
95 "Last-Translator: Aurelien Jarno <aurelien@aurel32.net>\n"
96 "Language-Team: FRANCAIS <fr@li.org>\n"
97 "MIME-Version: 1.0\n"
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| /openbmc/u-boot/arch/arm/mach-snapdragon/include/mach/ |
| H A D | sysmap-apq8016.h | 18 #define SDCC_BCR(n) ((n * 0x1000) + 0x41000) argument
19 #define SDCC_CMD_RCGR(n) ((n * 0x1000) + 0x41004) argument
20 #define SDCC_CFG_RCGR(n) ((n * 0x1000) + 0x41008) argument
21 #define SDCC_M(n) ((n * 0x1000) + 0x4100C) argument
22 #define SDCC_N(n) ((n * 0x1000) + 0x41010) argument
23 #define SDCC_D(n) ((n * 0x1000) + 0x41014) argument
24 #define SDCC_APPS_CBCR(n) ((n * 0x1000) + 0x41018) argument
25 #define SDCC_AHB_CBCR(n) ((n * 0x1000) + 0x4101C) argument
|