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Searched refs:mux_shift (Results 1 – 25 of 26) sorted by relevance

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/openbmc/linux/drivers/clk/rockchip/
H A Dclk-ddr.c19 int mux_shift; member
77 ddrclk->mux_offset) >> ddrclk->mux_shift; in rockchip_ddrclk_get_parent()
93 int mux_shift, int mux_width, in rockchip_clk_register_ddrclk() argument
127 ddrclk->mux_shift = mux_shift; in rockchip_clk_register_ddrclk()
H A Dclk.h535 u8 mux_shift; member
560 .mux_shift = ms, \
581 .mux_shift = ms, \
640 .mux_shift = ms, \
658 .mux_shift = ms, \
677 .mux_shift = ms, \
765 .mux_shift = s, \
780 .mux_shift = s, \
796 .mux_shift = s, \
905 .mux_shift = ms, \
[all …]
H A Dclk.c41 int muxdiv_offset, u8 mux_shift, u8 mux_width, u8 mux_flags, in rockchip_clk_register_branch() argument
62 mux->shift = mux_shift; in rockchip_clk_register_branch()
275 frac_mux->shift = child->mux_shift; in rockchip_clk_register_frac_branch()
452 list->mux_shift, list->mux_width, in rockchip_clk_register_branches()
460 list->mux_shift, list->mux_width, in rockchip_clk_register_branches()
467 list->mux_shift, list->mux_width, in rockchip_clk_register_branches()
499 list->mux_shift, list->mux_width, in rockchip_clk_register_branches()
517 list->mux_shift, in rockchip_clk_register_branches()
552 list->muxdiv_offset, list->mux_shift, in rockchip_clk_register_branches()
H A Dclk-half-divider.c161 int muxdiv_offset, u8 mux_shift, in rockchip_clk_register_halfdiv() argument
182 mux->shift = mux_shift; in rockchip_clk_register_halfdiv()
/openbmc/u-boot/drivers/clk/mediatek/
H A Dclk-mtk.h107 signed char mux_shift; member
117 .mux_shift = _shift, \
132 .mux_shift = _shift, \
H A Dclk-mtk.c72 val &= ~(mux->mux_mask << mux->mux_shift); in mtk_clk_mux_set_parent()
74 val |= index << mux->mux_shift; in mtk_clk_mux_set_parent()
297 index &= mux->mux_mask << mux->mux_shift; in mtk_topckgen_get_mux_rate()
298 index = index >> mux->mux_shift; in mtk_topckgen_get_mux_rate()
/openbmc/linux/drivers/clk/mediatek/
H A Dclk-mtk.h100 signed char mux_shift; member
117 .mux_shift = _shift, \
153 .mux_shift = _shift, \
172 .mux_shift = -1, \
H A Dclk-mux.c90 val = (val >> mux->data->mux_shift) & mask; in mtk_clk_mux_get_parent()
108 val = (orig & ~(mask << mux->data->mux_shift)) in mtk_clk_mux_set_parent_setclr_lock()
109 | (index << mux->data->mux_shift); in mtk_clk_mux_set_parent_setclr_lock()
113 mask << mux->data->mux_shift); in mtk_clk_mux_set_parent_setclr_lock()
115 index << mux->data->mux_shift); in mtk_clk_mux_set_parent_setclr_lock()
H A Dclk-mux.h31 u8 mux_shift; member
49 .mux_shift = _shift, \
H A Dclk-cpumux.c80 cpumux->shift = mux->mux_shift; in mtk_clk_register_cpumux()
H A Dclk-mtk.c232 if (mc->mux_shift >= 0) { in mtk_clk_register_composite()
239 mux->shift = mc->mux_shift; in mtk_clk_register_composite()
/openbmc/u-boot/drivers/clk/mvebu/
H A Darmada-37xx-periph.c72 int mux_shift; member
110 .mux_shift = _mux, \
128 .mux_shift = _mux, \
162 .mux_shift = _mux, \
174 .mux_shift = _mux, \
251 int tbg = get_mux(priv, clk->mux_shift); in get_parent_rate()
460 set_mux(priv, periph_clk->mux_shift, parent->id); in armada_37xx_periph_clk_set_parent()
/openbmc/u-boot/drivers/pinctrl/nxp/
H A Dpinctrl-imx.c27 u32 mux_shift = info->mux_mask ? ffs(info->mux_mask) - 1 : 0; in imx_pinctrl_set_state() local
112 mux_mode << mux_shift); in imx_pinctrl_set_state()
/openbmc/linux/drivers/pinctrl/freescale/
H A Dpinctrl-imx.h92 u8 mux_shift; member
H A Dpinctrl-imx8ulp.c248 .mux_shift = BP_MUX_MODE,
H A Dpinctrl-imx7ulp.c289 .mux_shift = BP_MUX_MODE,
H A Dpinctrl-vf610.c322 .mux_shift = 20,
H A Dpinctrl-imx.c187 reg |= (pin_mmio->mux_mode << info->mux_shift); in imx_pmx_set_one_pin_mmio()
/openbmc/linux/drivers/clk/
H A Dclk-bm1880.c119 s8 mux_shift; member
156 .mux_shift = -1, \
170 .mux_shift = _mux_shift, \
768 if (clks->mux_shift >= 0) { in bm1880_clk_register_composite()
775 mux->shift = clks->mux_shift; in bm1880_clk_register_composite()
/openbmc/linux/drivers/clk/x86/
H A Dclk-cgu.h177 u8 mux_shift; member
213 .mux_shift = _shift, \
H A Dclk-cgu.c86 u8 shift = list->mux_shift; in lgm_clk_register_mux()
/openbmc/linux/drivers/pinctrl/
H A Dpinctrl-pistachio.c90 int mux_shift; member
645 .mux_shift = -1, \
659 .mux_shift = -1, \
673 .mux_shift = _shift, \
966 val &= ~(pg->mux_mask << pg->mux_shift); in pistachio_pinmux_enable()
967 val |= i << pg->mux_shift; in pistachio_pinmux_enable()
H A Dpinctrl-zynq.c74 u8 mux_shift; member
772 .mux_shift = shift, \
913 reg |= pgrp->pins[0] << func->mux_shift; in zynq_pinmux_set_mux()
/openbmc/linux/drivers/soc/tegra/
H A Dpmc.c205 u32 mux_shift; member
224 u8 mux_shift; member
246 .mux_shift = 6,
254 .mux_shift = 14,
262 .mux_shift = 22,
2586 val = tegra_pmc_readl(pmc, clk->offs) >> clk->mux_shift; in pmc_clk_mux_get_parent()
2598 val &= ~(PMC_CLK_OUT_MUX_MASK << clk->mux_shift); in pmc_clk_mux_set_parent()
2599 val |= index << clk->mux_shift; in pmc_clk_mux_set_parent()
2672 pmc_clk->mux_shift = data->mux_shift; in tegra_pmc_clk_out_register()
/openbmc/linux/sound/soc/intel/atom/
H A Dsst-atom-controls.h569 const int *mux_shift; member

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