Home
last modified time | relevance | path

Searched refs:mul_shift (Results 1 – 5 of 5) sorted by relevance

/openbmc/linux/drivers/clk/at91/
H A Dclk-pll.c20 #define PLL_MUL(reg, layout) (((reg) >> (layout)->mul_shift) & \
90 ((pll->mul & layout->mul_mask) << layout->mul_shift)); in clk_pll_prepare()
359 .mul_shift = 16,
365 .mul_shift = 16,
371 .mul_shift = 16,
377 .mul_shift = 18,
H A Dclk-sam9x60-pll.c96 cmul = (val & core->layout->mul_mask) >> core->layout->mul_shift; in sam9x60_frac_pll_set()
111 (frac->mul << core->layout->mul_shift) | in sam9x60_frac_pll_set()
263 cmul = (val & core->layout->mul_mask) >> core->layout->mul_shift; in sam9x60_frac_pll_set_rate_chg()
270 (frac->mul << core->layout->mul_shift) | in sam9x60_frac_pll_set_rate_chg()
H A Dpmc.h63 u8 mul_shift; member
H A Dsam9x60.c49 .mul_shift = 24,
H A Dsama7g5.c86 .mul_shift = 24,