Searched refs:msa_wr_d (Results 1 – 1 of 1) sorted by relevance
| /openbmc/qemu/target/mips/tcg/ |
| H A D | msa_translate.c | 125 static TCGv_i64 msa_wr_d[64]; variable
139 msa_wr_d[i * 2] = fpu_f64[i]; in msa_translate_init()
142 msa_wr_d[i * 2 + 1] = in msa_translate_init()
206 tcg_gen_subi_i64(t0, msa_wr_d[wt << 1], eval_zero_or_big); in gen_check_zero_element()
207 tcg_gen_andc_i64(t0, t0, msa_wr_d[wt << 1]); in gen_check_zero_element()
209 tcg_gen_subi_i64(t1, msa_wr_d[(wt << 1) + 1], eval_zero_or_big); in gen_check_zero_element()
210 tcg_gen_andc_i64(t1, t1, msa_wr_d[(wt << 1) + 1]); in gen_check_zero_element()
232 tcg_gen_or_i64(t0, msa_wr_d[wt << 1], msa_wr_d[(wt << 1) + 1]); in gen_msa_BxZ_V()
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