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Searched refs:mmu_idx (Results 1 – 25 of 105) sorted by relevance

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/openbmc/qemu/accel/tcg/
H A Dcputlb.c343 int mmu_idx = ctz32(work); in tlb_flush_by_mmuidx_async_work() local
508 int mmu_idx; in tlb_flush_page_by_mmuidx_async_0() local
515 for (mmu_idx = 0; mmu_idx < NB_MMU_MODES; mmu_idx++) { in tlb_flush_page_by_mmuidx_async_0()
753 int mmu_idx; in tlb_flush_range_by_mmuidx_async_0() local
761 for (mmu_idx = 0; mmu_idx < NB_MMU_MODES; mmu_idx++) { in tlb_flush_range_by_mmuidx_async_0()
1011 int mmu_idx; in tlb_reset_dirty() local
1014 for (mmu_idx = 0; mmu_idx < NB_MMU_MODES; mmu_idx++) { in tlb_reset_dirty()
1044 int mmu_idx; in tlb_set_dirty() local
1050 for (mmu_idx = 0; mmu_idx < NB_MMU_MODES; mmu_idx++) { in tlb_set_dirty()
1054 for (mmu_idx = 0; mmu_idx < NB_MMU_MODES; mmu_idx++) { in tlb_set_dirty()
[all …]
H A Dldst_common.c.inc240 MemOpIdx oi = make_memop_idx(MO_UB, mmu_idx);
245 int mmu_idx, uintptr_t ra)
258 int mmu_idx, uintptr_t ra)
285 int mmu_idx, uintptr_t ra)
305 int mmu_idx, uintptr_t ra)
307 MemOpIdx oi = make_memop_idx(MO_UB, mmu_idx);
312 int mmu_idx, uintptr_t ra)
319 int mmu_idx, uintptr_t ra)
326 int mmu_idx, uintptr_t ra)
333 int mmu_idx, uintptr_t ra)
[all …]
/openbmc/qemu/target/arm/tcg/
H A Dhflags.c81 !((mmu_idx & ARM_MMU_IDX_M_NEGPRI) && in rebuild_hflags_m32()
170 ARMMMUIdx stage1 = stage_1_mmu_idx(mmu_idx); in rebuild_hflags_a64()
171 uint64_t tcr = regime_tcr(env, mmu_idx); in rebuild_hflags_a64()
178 tbid = aa64_va_parameter_tbi(tcr, mmu_idx); in rebuild_hflags_a64()
260 switch (mmu_idx) { in rebuild_hflags_a64()
352 ARMMMUIdx mmu_idx = arm_mmu_idx_el(env, el); in rebuild_hflags_internal() local
376 ARMMMUIdx mmu_idx = arm_mmu_idx_el(env, el); in HELPER() local
384 ARMMMUIdx mmu_idx = arm_mmu_idx_el(env, el); in HELPER() local
397 ARMMMUIdx mmu_idx = arm_mmu_idx_el(env, el); in HELPER() local
404 ARMMMUIdx mmu_idx = arm_mmu_idx_el(env, el); in HELPER() local
[all …]
H A Dtlb_helper.c23 mmu_idx = stage_1_mmu_idx(mmu_idx); in arm_s1_regime_using_lpae_format()
24 return regime_using_lpae_format(env, mmu_idx); in arm_s1_regime_using_lpae_format()
76 ARMMMUIdx arm_mmu_idx = core_to_arm_mmu_idx(env, mmu_idx); in compute_fsr_fsc()
165 int mmu_idx, ARMMMUFaultInfo *fi) in arm_deliver_fault() argument
220 fsr = compute_fsr_fsc(env, fi, target_el, mmu_idx, &fsc); in arm_deliver_fault()
245 int mmu_idx, uintptr_t retaddr) in arm_cpu_do_unaligned_access() argument
254 arm_deliver_fault(cpu, vaddr, access_type, mmu_idx, &fi); in arm_cpu_do_unaligned_access()
261 int mmu_idx = cpu_mmu_index(env, true); in helper_exception_pc_alignment() local
295 arm_deliver_fault(cpu, addr, access_type, mmu_idx, &fi); in arm_cpu_do_transaction_failed()
299 MMUAccessType access_type, int mmu_idx, in arm_cpu_tlb_fill() argument
[all …]
H A Dmte_helper.c294 int mmu_idx = cpu_mmu_index(env, false); in HELPER() local
347 int mmu_idx = cpu_mmu_index(env, false); in do_stg() local
374 int mmu_idx = cpu_mmu_index(env, false); in HELPER() local
384 int mmu_idx = cpu_mmu_index(env, false); in do_st2g() local
432 int mmu_idx = cpu_mmu_index(env, false); in HELPER() local
448 int mmu_idx = cpu_mmu_index(env, false); in HELPER() local
801 int mmu_idx, ptr_tag, bit55; in mte_probe_int() local
945 int mmu_idx, bit55; in HELPER() local
1047 int mmu_idx, tag_count; in mte_mops_probe() local
1097 int mmu_idx, tag_count; in mte_mops_probe_rev() local
[all …]
H A Dm_helper.c168 ARMMMUIdx mmu_idx = ARM_MMU_IDX_M; in arm_v7m_mmu_idx_all() local
179 mmu_idx |= ARM_MMU_IDX_M_S; in arm_v7m_mmu_idx_all()
182 return mmu_idx; in arm_v7m_mmu_idx_all()
393 ARMMMUIdx mmu_idx; in HELPER() local
664 ARMMMUIdx mmu_idx; in arm_v7m_load_vector() local
766 ARMMMUIdx mmu_idx; in v7m_push_callee_stack() local
788 mmu_idx = arm_mmu_idx(env); in v7m_push_callee_stack()
1629 ARMMMUIdx mmu_idx; in do_v7m_exception_exit() local
1924 ARMMMUIdx mmu_idx; in do_v7m_function_return() local
2091 ARMMMUIdx mmu_idx; in v7m_handle_execute_nsc() local
[all …]
/openbmc/qemu/target/arm/
H A Dptw.c131 switch (mmu_idx) { in stage_1_mmu_idx()
139 return mmu_idx; in stage_1_mmu_idx()
237 switch (mmu_idx) { in regime_translation_disabled()
1329 switch (mmu_idx) { in get_S1prot()
1961 switch (mmu_idx) { in get_phys_addr_lpae()
3096 switch (mmu_idx) { in get_phys_addr_disabled()
3290 switch (mmu_idx) { in get_phys_addr_nogpc()
3434 .in_mmu_idx = mmu_idx, in get_phys_addr_with_space_nogpc()
3445 .in_mmu_idx = mmu_idx, in get_phys_addr()
3449 switch (mmu_idx) { in get_phys_addr()
[all …]
H A Dinternals.h626 return mmu_idx | ARM_MMU_IDX_M; in core_to_arm_mmu_idx()
628 return mmu_idx | ARM_MMU_IDX_A; in core_to_arm_mmu_idx()
635 return mmu_idx | ARM_MMU_IDX_A; in core_to_aa64_mmu_idx()
685 switch (mmu_idx) { in regime_has_2_ranges()
703 switch (mmu_idx) { in regime_is_pan()
715 return mmu_idx == ARMMMUIdx_Stage2 || mmu_idx == ARMMMUIdx_Stage2_S; in regime_is_stage2()
721 switch (mmu_idx) { in regime_el()
754 switch (mmu_idx) { in regime_is_user()
790 if (mmu_idx == ARMMMUIdx_Stage2) { in regime_tcr()
812 int el = regime_el(env, mmu_idx); in regime_using_lpae_format()
[all …]
/openbmc/qemu/target/mips/sysemu/
H A Dphysaddr.c24 static int is_seg_am_mapped(unsigned int am, bool eu, int mmu_idx) in is_seg_am_mapped() argument
41 switch (mmu_idx) { in is_seg_am_mapped()
84 int mapped = is_seg_am_mapped(am, eu, mmu_idx); in get_seg_physical_address()
117 MMUAccessType access_type, int mmu_idx) in get_physical_address() argument
121 int user_mode = mmu_idx == MIPS_HFLAG_UM; in get_physical_address()
122 int supervisor_mode = mmu_idx == MIPS_HFLAG_SM; in get_physical_address()
143 mmu_idx, segctl, 0x3FFFFFFF); in get_physical_address()
207 access_type, mmu_idx, in get_physical_address()
212 access_type, mmu_idx, in get_physical_address()
217 access_type, mmu_idx, in get_physical_address()
[all …]
/openbmc/qemu/target/ppc/
H A Dmem_helper.c58 MMUAccessType access_type, int mmu_idx, in probe_contiguous() argument
86 int mmu_idx = cpu_mmu_index(env, false); in helper_lmw() local
88 MMU_DATA_LOAD, mmu_idx, raddr); in helper_lmw()
108 int mmu_idx = cpu_mmu_index(env, false); in helper_stmw() local
110 MMU_DATA_STORE, mmu_idx, raddr); in helper_stmw()
130 int mmu_idx; in do_lsw() local
138 mmu_idx = cpu_mmu_index(env, false); in do_lsw()
219 int mmu_idx; in helper_stsw() local
227 mmu_idx = cpu_mmu_index(env, false); in helper_stsw()
299 haddr = probe_write(env, addr, dcbz_size, mmu_idx, retaddr); in dcbz_common()
[all …]
H A Dmmu-radix64.c184 int mmu_idx, bool partition_scoped) in ppc_radix64_check_prot() argument
203 } else if (mmuidx_pr(mmu_idx) || (pte & R_PTE_EAA_PRIV) || in ppc_radix64_check_prot()
400 eaddr, mmu_idx, g_raddr); in ppc_radix64_partition_scoped_xlate()
479 eaddr, mmu_idx, pid); in ppc_radix64_process_scoped_xlate()
592 g_prot, mmu_idx, false)) { in ppc_radix64_process_scoped_xlate()
640 assert(!(mmuidx_hv(mmu_idx) && cpu->vhyp)); in ppc_radix64_xlate_impl()
642 relocation = !mmuidx_real(mmu_idx); in ppc_radix64_xlate_impl()
650 if (mmuidx_hv(mmu_idx) || !env->has_hv_mode) { in ppc_radix64_xlate_impl()
739 if (lpid || !mmuidx_hv(mmu_idx)) { in ppc_radix64_xlate_impl()
745 mmu_idx, lpid, in ppc_radix64_xlate_impl()
[all …]
H A Dmmu-hash32.c90 static int ppc_hash32_pte_prot(int mmu_idx, in ppc_hash32_pte_prot() argument
95 key = !!(mmuidx_pr(mmu_idx) ? (sr & SR32_KP) : (sr & SR32_KS)); in ppc_hash32_pte_prot()
101 static target_ulong hash32_bat_size(int mmu_idx, in hash32_bat_size() argument
104 if ((mmuidx_pr(mmu_idx) && !(batu & BATU32_VP)) in hash32_bat_size()
105 || (!mmuidx_pr(mmu_idx) && !(batu & BATU32_VS))) { in hash32_bat_size()
130 int mmu_idx) in ppc_hash32_bat_lookup() argument
151 mask = hash32_bat_size(mmu_idx, batu, batl); in ppc_hash32_bat_lookup()
193 hwaddr *raddr, int *prot, int mmu_idx, in ppc_hash32_direct_store() argument
198 int key = !!(mmuidx_pr(mmu_idx) ? (sr & SR32_KP) : (sr & SR32_KS)); in ppc_hash32_direct_store()
401 if (mmuidx_real(mmu_idx)) { in ppc_hash32_xlate()
[all …]
H A Dmmu-hash64.c396 static int ppc_hash64_pte_prot(int mmu_idx, in ppc_hash64_pte_prot() argument
406 key = !!(mmuidx_pr(mmu_idx) ? (slb->vsid & SLB_VSID_KP) in ppc_hash64_pte_prot()
779 if (!mmuidx_real(mmu_idx)) { in ppc_hash64_set_isi()
784 if (vpm && !mmuidx_hv(mmu_idx)) { in ppc_hash64_set_isi()
799 if (!mmuidx_real(mmu_idx)) { in ppc_hash64_set_dsi()
804 if (vpm && !mmuidx_hv(mmu_idx)) { in ppc_hash64_set_dsi()
963 if (mmuidx_real(mmu_idx)) { in ppc_hash64_xlate()
975 } else if (mmuidx_hv(mmu_idx) || !env->has_hv_mode) { in ppc_hash64_xlate()
1009 ppc_hash64_set_dsi(cs, mmu_idx, 0, eaddr, in ppc_hash64_xlate()
1081 ppc_hash64_set_dsi(cs, mmu_idx, slb->vsid, eaddr, in ppc_hash64_xlate()
[all …]
/openbmc/qemu/target/sparc/
H A Dmmu_helper.c69 int rw, int mmu_idx) in get_physical_address() argument
79 is_user = mmu_idx == MMU_USER_IDX; in get_physical_address()
81 if (mmu_idx == MMU_PHYS_IDX) { in get_physical_address()
232 tlb_set_page_full(cs, mmu_idx, vaddr, &full); in sparc_cpu_tlb_fill()
248 tlb_set_page_full(cs, mmu_idx, vaddr, &full); in sparc_cpu_tlb_fill()
507 switch (mmu_idx) { in build_sfsr()
554 sfsr = build_sfsr(env, mmu_idx, rw); in get_physical_address_data()
556 switch (mmu_idx) { in get_physical_address_data()
653 switch (mmu_idx) { in get_physical_address_code()
744 if (mmu_idx == MMU_PHYS_IDX) { in get_physical_address()
[all …]
H A Dtrace-events4 …uint64_t address, uint64_t context, int mmu_idx, uint32_t tl) "DFAULT at 0x%"PRIx64" context 0x%"P…
5 …(uint64_t address, uint64_t context, int mmu_idx, uint32_t tl) "DPROT at 0x%"PRIx64" context 0x%"P…
9 …_phys_addr_code(uint32_t tl, int mmu_idx, uint64_t prim_context, uint64_t sec_context, uint64_t ad…
10 …_phys_addr_data(uint32_t tl, int mmu_idx, uint64_t prim_context, uint64_t sec_context, uint64_t ad…
11 …nt64_t paddr, int mmu_idx, uint32_t tl, uint64_t prim_context, uint64_t sec_context) "Translate at…
/openbmc/qemu/target/riscv/
H A Dop_helper.c160 int mmu_idx = cpu_mmu_index(env, false); in helper_cbo_zero() local
208 int mmu_idx = cpu_mmu_index(env, false); in check_zicbom_access() local
241 probe_write(env, address, cbomlen, mmu_idx, ra); in check_zicbom_access()
452 MemOpIdx oi = make_memop_idx(MO_UB, mmu_idx); in helper_hyp_hlv_bu()
461 MemOpIdx oi = make_memop_idx(MO_TEUW, mmu_idx); in helper_hyp_hlv_hu()
470 MemOpIdx oi = make_memop_idx(MO_TEUL, mmu_idx); in helper_hyp_hlv_wu()
479 MemOpIdx oi = make_memop_idx(MO_TEUQ, mmu_idx); in helper_hyp_hlv_d()
488 MemOpIdx oi = make_memop_idx(MO_UB, mmu_idx); in helper_hyp_hsv_b()
497 MemOpIdx oi = make_memop_idx(MO_TEUW, mmu_idx); in helper_hyp_hsv_h()
506 MemOpIdx oi = make_memop_idx(MO_TEUL, mmu_idx); in helper_hyp_hsv_w()
[all …]
H A Dinternals.h40 static inline int mmuidx_priv(int mmu_idx) in mmuidx_priv() argument
42 int ret = mmu_idx & 3; in mmuidx_priv()
49 static inline bool mmuidx_sum(int mmu_idx) in mmuidx_sum() argument
51 return (mmu_idx & 3) == MMUIdx_S_SUM; in mmuidx_sum()
54 static inline bool mmuidx_2stage(int mmu_idx) in mmuidx_2stage() argument
56 return mmu_idx & MMU_2STAGE_BIT; in mmuidx_2stage()
/openbmc/qemu/include/exec/
H A Dcpu_ldst.h176 int mmu_idx, uintptr_t ra);
180 int mmu_idx, uintptr_t ra);
188 int mmu_idx, uintptr_t ra);
195 int mmu_idx, uintptr_t ra);
197 int mmu_idx, uintptr_t ra);
199 int mmu_idx, uintptr_t ra);
201 int mmu_idx, uintptr_t ra);
203 int mmu_idx, uintptr_t ra);
205 int mmu_idx, uintptr_t ra);
207 int mmu_idx, uintptr_t ra);
[all …]
H A Dexec-all.h244 void tlb_set_page_full(CPUState *cpu, int mmu_idx, vaddr addr,
271 int prot, int mmu_idx, vaddr size);
280 int mmu_idx, vaddr size);
387 MMUAccessType access_type, int mmu_idx, uintptr_t retaddr);
390 int mmu_idx, uintptr_t retaddr) in probe_write() argument
392 return probe_access(env, addr, size, MMU_DATA_STORE, mmu_idx, retaddr); in probe_write()
396 int mmu_idx, uintptr_t retaddr) in probe_read() argument
398 return probe_access(env, addr, size, MMU_DATA_LOAD, mmu_idx, retaddr); in probe_read()
421 MMUAccessType access_type, int mmu_idx,
434 MMUAccessType access_type, int mmu_idx,
[all …]
/openbmc/qemu/target/i386/tcg/sysemu/
H A Dsvm_helper.c42 mmu_idx, 0); in svm_save_seg()
62 mmu_idx, 0); in svm_load_seg()
65 mmu_idx, 0); in svm_load_seg()
68 mmu_idx, 0); in svm_load_seg()
71 mmu_idx, 0); in svm_load_seg()
468 int mmu_idx = MMU_PHYS_IDX; in helper_vmload() local
485 mmu_idx = MMU_NESTED_IDX; in helper_vmload()
492 svm_load_seg(env, mmu_idx, in helper_vmload()
494 svm_load_seg(env, mmu_idx, in helper_vmload()
529 int mmu_idx = MMU_PHYS_IDX; in helper_vmsave() local
[all …]
H A Dexcp_helper.c30 int mmu_idx; member
139 const bool is_user = (in->mmu_idx == MMU_USER_IDX); in mmu_translate()
360 if (in->mmu_idx != MMU_KSMAP_IDX || !(ptep & PG_USER_MASK)) { in mmu_translate()
528 MMUAccessType access_type, int mmu_idx, in get_physical_address() argument
537 switch (mmu_idx) { in get_physical_address()
545 in.mmu_idx = MMU_USER_IDX; in get_physical_address()
557 if (is_mmu_index_32(mmu_idx)) { in get_physical_address()
563 in.mmu_idx = mmu_idx; in get_physical_address()
592 MMUAccessType access_type, int mmu_idx, in x86_cpu_tlb_fill() argument
608 out.prot, mmu_idx, out.page_size); in x86_cpu_tlb_fill()
[all …]
/openbmc/qemu/target/microblaze/
H A Dhelper.c39 MMUAccessType access_type, int mmu_idx, in mb_cpu_tlb_fill() argument
51 if (mmu_idx == MMU_NOMMU_IDX) { in mb_cpu_tlb_fill()
55 tlb_set_page_with_attrs(cs, address, address, attrs, prot, mmu_idx, in mb_cpu_tlb_fill()
60 hit = mmu_translate(cpu, &lu, address, access_type, mmu_idx); in mb_cpu_tlb_fill()
66 mmu_idx, vaddr, paddr, lu.prot); in mb_cpu_tlb_fill()
67 tlb_set_page_with_attrs(cs, vaddr, paddr, attrs, lu.prot, mmu_idx, in mb_cpu_tlb_fill()
78 mmu_idx, address); in mb_cpu_tlb_fill()
234 int mmu_idx = cpu_mmu_index(env, false); in mb_cpu_get_phys_page_attrs_debug() local
241 if (mmu_idx != MMU_NOMMU_IDX) { in mb_cpu_get_phys_page_attrs_debug()
274 int mmu_idx, uintptr_t retaddr) in mb_cpu_do_unaligned_access() argument
/openbmc/qemu/target/hppa/
H A Dmem_helper.c169 if (MMU_IDX_MMU_DISABLED(mmu_idx)) { in hppa_get_physical_address()
170 switch (mmu_idx) { in hppa_get_physical_address()
205 priv = MMU_IDX_TO_PRIV(mmu_idx); in hppa_get_physical_address()
228 if (ent->access_id && MMU_IDX_TO_P(mmu_idx)) { in hppa_get_physical_address()
291 int prot, excp, mmu_idx; in hppa_cpu_get_phys_page_debug() local
296 mmu_idx = (cpu->env.psw & PSW_D ? MMU_KERNEL_IDX : in hppa_cpu_get_phys_page_debug()
357 MMUAccessType type, int mmu_idx, in hppa_cpu_tlb_fill() argument
378 excp = hppa_get_physical_address(env, addr, mmu_idx, in hppa_cpu_tlb_fill()
402 prot, mmu_idx, TARGET_PAGE_SIZE); in hppa_cpu_tlb_fill()
649 int mmu_idx = cpu_mmu_index(env, 0); in HELPER() local
[all …]
/openbmc/qemu/target/s390x/tcg/
H A Dmem_helper.c134 int mmu_idx; member
192 access->mmu_idx = mmu_idx; in access_prepare_nf()
247 desta->mmu_idx, ra); in access_memset()
252 desta->mmu_idx, ra); in access_memset()
361 const int mmu_idx = cpu_mmu_index(env, false); in do_helper_nc() local
395 const int mmu_idx = cpu_mmu_index(env, false); in do_helper_xc() local
436 const int mmu_idx = cpu_mmu_index(env, false); in do_helper_oc() local
470 const int mmu_idx = cpu_mmu_index(env, false); in do_helper_mvc() local
511 const int mmu_idx = cpu_mmu_index(env, false); in HELPER() local
532 const int mmu_idx = cpu_mmu_index(env, false); in HELPER() local
[all …]
/openbmc/qemu/target/tricore/
H A Dhelper.c36 MMUAccessType access_type, int mmu_idx) in get_physical_address() argument
51 int mmu_idx = cpu_mmu_index(&cpu->env, false); in tricore_cpu_get_phys_page_debug() local
54 MMU_DATA_LOAD, mmu_idx)) { in tricore_cpu_get_phys_page_debug()
67 MMUAccessType rw, int mmu_idx, in tricore_cpu_tlb_fill() argument
78 address, rw, mmu_idx); in tricore_cpu_tlb_fill()
87 mmu_idx, TARGET_PAGE_SIZE); in tricore_cpu_tlb_fill()

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