Home
last modified time | relevance | path

Searched refs:mmVGA_INTERRUPT_CONTROL (Results 1 – 13 of 13) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h4385 #define mmVGA_INTERRUPT_CONTROL 0x00D1 macro
H A Ddce_8_0_d.h5152 #define mmVGA_INTERRUPT_CONTROL 0xd1 macro
H A Ddce_10_0_d.h6035 #define mmVGA_INTERRUPT_CONTROL 0xd1 macro
H A Ddce_11_0_d.h6112 #define mmVGA_INTERRUPT_CONTROL 0xd1 macro
H A Ddce_11_2_d.h7786 #define mmVGA_INTERRUPT_CONTROL 0xd1 macro
H A Ddce_12_0_offset.h580 #define mmVGA_INTERRUPT_CONTROL … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_offset.h43 #define mmVGA_INTERRUPT_CONTROL … macro
H A Ddcn_3_0_1_offset.h174 #define mmVGA_INTERRUPT_CONTROL … macro
H A Ddcn_1_0_offset.h414 #define mmVGA_INTERRUPT_CONTROL … macro
H A Ddcn_2_1_0_offset.h122 #define mmVGA_INTERRUPT_CONTROL … macro
H A Ddcn_3_0_2_offset.h58 #define mmVGA_INTERRUPT_CONTROL … macro
H A Ddcn_2_0_0_offset.h58 #define mmVGA_INTERRUPT_CONTROL … macro
H A Ddcn_3_0_0_offset.h40 #define mmVGA_INTERRUPT_CONTROL … macro