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Searched refs:mmVGA41_PPLL_POST_DIV (Results 1 – 4 of 4) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h4376 #define mmVGA41_PPLL_POST_DIV 0x00E2 macro
H A Ddce_8_0_d.h1003 #define mmVGA41_PPLL_POST_DIV 0xe2 macro
H A Ddce_10_0_d.h6145 #define mmVGA41_PPLL_POST_DIV 0x171a macro
H A Ddce_11_0_d.h6222 #define mmVGA41_PPLL_POST_DIV 0x171a macro