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Searched refs:mmVCN_RAS_CNTL (Results 1 – 2 of 2) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_2_5_offset.h996 #define mmVCN_RAS_CNTL … macro
/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Dvcn_v2_5.c805 SOC15_DPG_MODE_OFFSET(VCN, 0, mmVCN_RAS_CNTL), in vcn_v2_6_enable_ras()