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Searched refs:mmVCE_LMI_CACHE_CTRL (Results 1 – 7 of 7) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/vce/
H A Dvce_1_0_d.h28 #define mmVCE_LMI_CACHE_CTRL 0x83BD macro
H A Dvce_2_0_d.h66 #define mmVCE_LMI_CACHE_CTRL 0x853d macro
H A Dvce_3_0_d.h71 #define mmVCE_LMI_CACHE_CTRL 0x85bd macro
H A Dvce_4_0_offset.h144 #define mmVCE_LMI_CACHE_CTRL … macro
/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Dvce_v2_0.c178 WREG32_P(mmVCE_LMI_CACHE_CTRL, 0x0, ~0x1); in vce_v2_0_mc_resume()
H A Dvce_v4_0.c243 MMSCH_V1_0_INSERT_DIRECT_RD_MOD_WT(SOC15_REG_OFFSET(VCE, 0, mmVCE_LMI_CACHE_CTRL), ~0x1, 0); in vce_v4_0_sriov_start()
646 WREG32_P(SOC15_REG_OFFSET(VCE, 0, mmVCE_LMI_CACHE_CTRL), 0x0, ~0x1); in vce_v4_0_mc_resume()
H A Dvce_v3_0.c562 WREG32_P(mmVCE_LMI_CACHE_CTRL, 0x0, ~0x1); in vce_v3_0_mc_resume()