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Searched refs:mmUVD_SEMA_WAIT_FAULT_TIMEOUT_CNTL (Results 1 – 15 of 15) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/uvd/
H A Duvd_4_2_d.h79 #define mmUVD_SEMA_WAIT_FAULT_TIMEOUT_CNTL 0x3db2 macro
H A Duvd_4_0_d.h81 #define mmUVD_SEMA_WAIT_FAULT_TIMEOUT_CNTL 0x3DB2 macro
H A Duvd_3_1_d.h81 #define mmUVD_SEMA_WAIT_FAULT_TIMEOUT_CNTL 0x3db2 macro
H A Duvd_5_0_d.h85 #define mmUVD_SEMA_WAIT_FAULT_TIMEOUT_CNTL 0x3db2 macro
H A Duvd_6_0_d.h101 #define mmUVD_SEMA_WAIT_FAULT_TIMEOUT_CNTL 0x3db2 macro
H A Duvd_7_0_offset.h214 #define mmUVD_SEMA_WAIT_FAULT_TIMEOUT_CNTL macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_offset.h400 #define mmUVD_SEMA_WAIT_FAULT_TIMEOUT_CNTL macro
H A Dvcn_2_5_offset.h819 #define mmUVD_SEMA_WAIT_FAULT_TIMEOUT_CNTL macro
H A Dvcn_2_0_0_offset.h704 #define mmUVD_SEMA_WAIT_FAULT_TIMEOUT_CNTL macro
H A Dvcn_3_0_0_offset.h1205 #define mmUVD_SEMA_WAIT_FAULT_TIMEOUT_CNTL macro
/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Duvd_v4_2.c176 tmp = PACKET0(mmUVD_SEMA_WAIT_FAULT_TIMEOUT_CNTL, 0); in uvd_v4_2_hw_init()
H A Duvd_v3_1.c662 tmp = PACKET0(mmUVD_SEMA_WAIT_FAULT_TIMEOUT_CNTL, 0); in uvd_v3_1_hw_init()
H A Duvd_v5_0.c173 tmp = PACKET0(mmUVD_SEMA_WAIT_FAULT_TIMEOUT_CNTL, 0); in uvd_v5_0_hw_init()
H A Duvd_v6_0.c485 tmp = PACKET0(mmUVD_SEMA_WAIT_FAULT_TIMEOUT_CNTL, 0); in uvd_v6_0_hw_init()
H A Duvd_v7_0.c552 mmUVD_SEMA_WAIT_FAULT_TIMEOUT_CNTL), 0); in uvd_v7_0_hw_init()