Home
last modified time | relevance | path

Searched refs:mmUVD_RBC_RB_WPTR_CNTL_BASE_IDX (Results 1 – 5 of 5) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/uvd/
H A Duvd_7_0_offset.h203 #define mmUVD_RBC_RB_WPTR_CNTL_BASE_IDX … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_offset.h389 #define mmUVD_RBC_RB_WPTR_CNTL_BASE_IDX … macro
H A Dvcn_2_5_offset.h798 #define mmUVD_RBC_RB_WPTR_CNTL_BASE_IDX … macro
H A Dvcn_2_0_0_offset.h685 #define mmUVD_RBC_RB_WPTR_CNTL_BASE_IDX … macro
H A Dvcn_3_0_0_offset.h1184 #define mmUVD_RBC_RB_WPTR_CNTL_BASE_IDX … macro