Searched refs:mmUVD_CTX_INDEX (Results 1 – 14 of 14) sorted by relevance
| /openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/uvd/ |
| H A D | uvd_4_2_d.h | 40 #define mmUVD_CTX_INDEX 0x3d28 macro
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| H A D | uvd_4_0_d.h | 40 #define mmUVD_CTX_INDEX 0x3D28 macro
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| H A D | uvd_3_1_d.h | 40 #define mmUVD_CTX_INDEX 0x3d28 macro
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| H A D | uvd_5_0_d.h | 46 #define mmUVD_CTX_INDEX 0x3d28 macro
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| H A D | uvd_6_0_d.h | 62 #define mmUVD_CTX_INDEX 0x3d28 macro
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| H A D | uvd_7_0_offset.h | 140 #define mmUVD_CTX_INDEX … macro
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| /openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/vcn/ |
| H A D | vcn_1_0_offset.h | 300 #define mmUVD_CTX_INDEX … macro
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| H A D | vcn_2_5_offset.h | 603 #define mmUVD_CTX_INDEX … macro
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| H A D | vcn_2_0_0_offset.h | 500 #define mmUVD_CTX_INDEX … macro
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| H A D | vcn_3_0_0_offset.h | 939 #define mmUVD_CTX_INDEX … macro
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| /openbmc/linux/drivers/gpu/drm/amd/amdgpu/ |
| H A D | soc15.c | 223 address = SOC15_REG_OFFSET(UVD, 0, mmUVD_CTX_INDEX); in soc15_uvd_ctx_rreg()
237 address = SOC15_REG_OFFSET(UVD, 0, mmUVD_CTX_INDEX); in soc15_uvd_ctx_wreg()
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| H A D | cik.c | 205 WREG32(mmUVD_CTX_INDEX, ((reg) & 0x1ff)); in cik_uvd_ctx_rreg()
216 WREG32(mmUVD_CTX_INDEX, ((reg) & 0x1ff)); in cik_uvd_ctx_wreg()
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| H A D | vi.c | 377 WREG32(mmUVD_CTX_INDEX, ((reg) & 0x1ff)); in vi_uvd_ctx_rreg()
388 WREG32(mmUVD_CTX_INDEX, ((reg) & 0x1ff)); in vi_uvd_ctx_wreg()
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| H A D | si.c | 1096 WREG32(mmUVD_CTX_INDEX, ((reg) & 0x1ff)); in si_uvd_ctx_rreg()
1107 WREG32(mmUVD_CTX_INDEX, ((reg) & 0x1ff)); in si_uvd_ctx_wreg()
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