Searched refs:mmTPC5_QM_GLBL_CFG0 (Results 1 – 5 of 5) sorted by relevance
22 #define mmTPC5_QM_GLBL_CFG0 0xF48000 macro
1709 pb_addr = (mmTPC5_QM_GLBL_CFG0 & ~0xFFF) + PROT_BITS_OFFS; in goya_init_tpc_protection_bits()1710 word_offset = ((mmTPC5_QM_GLBL_CFG0 & PROT_BITS_OFFS) >> 7) << 2; in goya_init_tpc_protection_bits()1711 mask = 1 << ((mmTPC5_QM_GLBL_CFG0 & 0x7F) >> 2); in goya_init_tpc_protection_bits()
2094 WREG32(mmTPC5_QM_GLBL_CFG0, 0); in goya_disable_internal_queues()
11451 pb_addr = (mmTPC5_QM_GLBL_CFG0 & ~0xFFF) + PROT_BITS_OFFS; in gaudi_init_tpc_protection_bits()11452 word_offset = ((mmTPC5_QM_GLBL_CFG0 & PROT_BITS_OFFS) >> 7) << 2; in gaudi_init_tpc_protection_bits()11453 mask = 1U << ((mmTPC5_QM_GLBL_CFG0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()