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Searched refs:mmSCL5_SCL_ALU_CONTROL (Results 1 – 6 of 6) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h4257 #define mmSCL5_SCL_ALU_CONTROL 0x4A54 macro
H A Ddce_8_0_d.h4950 #define mmSCL5_SCL_ALU_CONTROL 0x4a54 macro
H A Ddce_10_0_d.h5666 #define mmSCL5_SCL_ALU_CONTROL 0x4554 macro
H A Ddce_11_0_d.h5724 #define mmSCL5_SCL_ALU_CONTROL 0x4554 macro
H A Ddce_11_2_d.h7051 #define mmSCL5_SCL_ALU_CONTROL 0x4554 macro
H A Ddce_12_0_offset.h7900 #define mmSCL5_SCL_ALU_CONTROL … macro