Searched refs:mmPSOC_EMMC_PLL_DIV_SEL_0 (Results 1 – 2 of 2) sorted by relevance
60 #define mmPSOC_EMMC_PLL_DIV_SEL_0 0xC70280 macro
1426 WREG32(mmPSOC_EMMC_PLL_DIV_SEL_0, 0x0); in goya_set_pll_refclk()