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Searched refs:mmMP0_SMN_C2PMSG_67 (Results 1 – 11 of 11) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Dpsp_v10_0.c150 return RREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_67); in psp_v10_0_ring_get_wptr()
157 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_67, value); in psp_v10_0_ring_set_wptr()
H A Dpsp_v11_0_8.c153 data = RREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_67); in psp_v11_0_8_ring_get_wptr()
167 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_67, value); in psp_v11_0_8_ring_set_wptr()
H A Dpsp_v12_0.c324 data = RREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_67); in psp_v12_0_ring_get_wptr()
337 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_67, value); in psp_v12_0_ring_set_wptr()
H A Dpsp_v3_1.c348 data = RREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_67); in psp_v3_1_ring_get_wptr()
363 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_67, value); in psp_v3_1_ring_set_wptr()
H A Dpsp_v11_0.c572 data = RREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_67); in psp_v11_0_ring_get_wptr()
586 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_67, value); in psp_v11_0_ring_set_wptr()
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/mp/
H A Dmp_12_0_0_offset.h98 #define mmMP0_SMN_C2PMSG_67 macro
H A Dmp_10_0_offset.h98 #define mmMP0_SMN_C2PMSG_67 macro
H A Dmp_9_0_offset.h98 #define mmMP0_SMN_C2PMSG_67 0x0083 macro
H A Dmp_11_0_8_offset.h98 #define mmMP0_SMN_C2PMSG_67 macro
H A Dmp_11_0_offset.h98 #define mmMP0_SMN_C2PMSG_67 macro
H A Dmp_11_5_0_offset.h98 #define mmMP0_SMN_C2PMSG_67 macro