| /openbmc/linux/drivers/gpu/drm/amd/amdgpu/ |
| H A D | psp_v12_0.c | 162 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64, GFX_CTRL_CMD_ID_GBR_IH_SET); in psp_v12_0_reroute_ih()
165 psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_64), in psp_v12_0_reroute_ih()
174 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64, GFX_CTRL_CMD_ID_GBR_IH_SET); in psp_v12_0_reroute_ih()
177 psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_64), in psp_v12_0_reroute_ih()
223 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64, psp_ring_reg); in psp_v12_0_ring_create()
229 ret = psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_64), in psp_v12_0_ring_create()
247 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64, in psp_v12_0_ring_stop()
258 ret = psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_64), in psp_v12_0_ring_stop()
288 offset = SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_64); in psp_v12_0_mode1_reset()
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| H A D | psp_v3_1.c | 167 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64, GFX_CTRL_CMD_ID_GBR_IH_SET); in psp_v3_1_reroute_ih()
170 psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_64), in psp_v3_1_reroute_ih()
179 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64, GFX_CTRL_CMD_ID_GBR_IH_SET); in psp_v3_1_reroute_ih()
182 psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_64), in psp_v3_1_reroute_ih()
237 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64, psp_ring_reg); in psp_v3_1_ring_create()
244 mmMP0_SMN_C2PMSG_64), 0x80000000, in psp_v3_1_ring_create()
262 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64, in psp_v3_1_ring_stop()
273 ret = psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_64), in psp_v3_1_ring_stop()
312 offset = SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_64); in psp_v3_1_mode1_reset()
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| H A D | psp_v11_0_8.c | 48 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64, in psp_v11_0_8_ring_stop()
53 ret = psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_64), in psp_v11_0_8_ring_stop()
95 ret = psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_64), in psp_v11_0_8_ring_create()
114 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64, psp_ring_reg); in psp_v11_0_8_ring_create()
120 ret = psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_64), in psp_v11_0_8_ring_create()
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| H A D | psp_v10_0.c | 89 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64, psp_ring_reg); in psp_v10_0_ring_create()
95 ret = psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_64), in psp_v10_0_ring_create()
110 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64, psp_ring_reg); in psp_v10_0_ring_stop()
116 ret = psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_64), in psp_v10_0_ring_stop()
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| H A D | psp_v11_0.c | 271 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64, in psp_v11_0_ring_stop()
282 ret = psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_64), in psp_v11_0_ring_stop()
324 ret = psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_64), in psp_v11_0_ring_create()
343 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64, psp_ring_reg); in psp_v11_0_ring_create()
349 ret = psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_64), in psp_v11_0_ring_create()
381 offset = SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_64); in psp_v11_0_mode1_reset()
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| /openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/mp/ |
| H A D | mp_12_0_0_offset.h | 92 #define mmMP0_SMN_C2PMSG_64 … macro
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| H A D | mp_10_0_offset.h | 92 #define mmMP0_SMN_C2PMSG_64 … macro
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| H A D | mp_9_0_offset.h | 92 #define mmMP0_SMN_C2PMSG_64 0x0080 macro
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| H A D | mp_11_0_8_offset.h | 92 #define mmMP0_SMN_C2PMSG_64 … macro
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| H A D | mp_11_0_offset.h | 92 #define mmMP0_SMN_C2PMSG_64 … macro
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| H A D | mp_11_5_0_offset.h | 92 #define mmMP0_SMN_C2PMSG_64 … macro
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