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Searched refs:mmLB0_LB_SYNC_RESET_SEL (Results 1 – 6 of 6) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h3885 #define mmLB0_LB_SYNC_RESET_SEL 0x1ACA macro
H A Ddce_8_0_d.h4622 #define mmLB0_LB_SYNC_RESET_SEL 0x1acc macro
H A Ddce_10_0_d.h5303 #define mmLB0_LB_SYNC_RESET_SEL 0x1acc macro
H A Ddce_11_0_d.h5361 #define mmLB0_LB_SYNC_RESET_SEL 0x1acc macro
H A Ddce_11_2_d.h6618 #define mmLB0_LB_SYNC_RESET_SEL 0x1acc macro
H A Ddce_12_0_offset.h3864 #define mmLB0_LB_SYNC_RESET_SEL … macro