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Searched refs:mmIC_PLL_DIV_SEL_1 (Results 1 – 2 of 2) sorted by relevance

/openbmc/linux/drivers/accel/habanalabs/include/goya/asic_reg/
H A Dic_pll_regs.h62 #define mmIC_PLL_DIV_SEL_1 0x4A3284 macro
/openbmc/linux/drivers/accel/habanalabs/goya/
H A Dgoya.c1407 WREG32(mmIC_PLL_DIV_SEL_1, 0x0); in goya_set_pll_refclk()