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Searched refs:mmFMT2_FMT_BIT_DEPTH_CONTROL (Results 1 – 12 of 12) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h3693 #define mmFMT2_FMT_BIT_DEPTH_CONTROL 0x41F2 macro
H A Ddce_8_0_d.h4424 #define mmFMT2_FMT_BIT_DEPTH_CONTROL 0x41f2 macro
H A Ddce_10_0_d.h5105 #define mmFMT2_FMT_BIT_DEPTH_CONTROL 0x1ff2 macro
H A Ddce_11_0_d.h5163 #define mmFMT2_FMT_BIT_DEPTH_CONTROL 0x1ff2 macro
H A Ddce_11_2_d.h6405 #define mmFMT2_FMT_BIT_DEPTH_CONTROL 0x1ff2 macro
H A Ddce_12_0_offset.h5836 #define mmFMT2_FMT_BIT_DEPTH_CONTROL … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_1_offset.h6204 #define mmFMT2_FMT_BIT_DEPTH_CONTROL … macro
H A Ddcn_1_0_offset.h5951 #define mmFMT2_FMT_BIT_DEPTH_CONTROL … macro
H A Ddcn_2_1_0_offset.h7433 #define mmFMT2_FMT_BIT_DEPTH_CONTROL … macro
H A Ddcn_3_0_2_offset.h7420 #define mmFMT2_FMT_BIT_DEPTH_CONTROL … macro
H A Ddcn_2_0_0_offset.h8464 #define mmFMT2_FMT_BIT_DEPTH_CONTROL … macro
H A Ddcn_3_0_0_offset.h8155 #define mmFMT2_FMT_BIT_DEPTH_CONTROL … macro