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Searched refs:mmDP_DTO4_PHASE (Results 1 – 10 of 10) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h3547 #define mmDP_DTO4_PHASE 0x0151 macro
H A Ddce_8_0_d.h1051 #define mmDP_DTO4_PHASE 0x151 macro
H A Ddce_10_0_d.h1209 #define mmDP_DTO4_PHASE 0x151 macro
H A Ddce_11_0_d.h1021 #define mmDP_DTO4_PHASE 0x151 macro
H A Ddce_11_2_d.h1099 #define mmDP_DTO4_PHASE 0x151 macro
H A Ddce_12_0_offset.h806 #define mmDP_DTO4_PHASE … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_1_0_offset.h606 #define mmDP_DTO4_PHASE … macro
H A Ddcn_3_0_2_offset.h240 #define mmDP_DTO4_PHASE … macro
H A Ddcn_2_0_0_offset.h244 #define mmDP_DTO4_PHASE … macro
H A Ddcn_3_0_0_offset.h226 #define mmDP_DTO4_PHASE … macro