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Searched refs:mmDP_AUX3_AUX_INTERRUPT_CONTROL (Results 1 – 12 of 12) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h3485 #define mmDP_AUX3_AUX_INTERRUPT_CONTROL 0x18C3 macro
H A Ddce_8_0_d.h4204 #define mmDP_AUX3_AUX_INTERRUPT_CONTROL 0x18c3 macro
H A Ddce_10_0_d.h4852 #define mmDP_AUX3_AUX_INTERRUPT_CONTROL 0x5c57 macro
H A Ddce_11_0_d.h4931 #define mmDP_AUX3_AUX_INTERRUPT_CONTROL 0x5c57 macro
H A Ddce_11_2_d.h6193 #define mmDP_AUX3_AUX_INTERRUPT_CONTROL 0x5c57 macro
H A Ddce_12_0_offset.h9920 #define mmDP_AUX3_AUX_INTERRUPT_CONTROL … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_1_offset.h7702 #define mmDP_AUX3_AUX_INTERRUPT_CONTROL … macro
H A Ddcn_2_1_0_offset.h9593 #define mmDP_AUX3_AUX_INTERRUPT_CONTROL … macro
H A Ddcn_1_0_offset.h8035 #define mmDP_AUX3_AUX_INTERRUPT_CONTROL … macro
H A Ddcn_3_0_2_offset.h9269 #define mmDP_AUX3_AUX_INTERRUPT_CONTROL … macro
H A Ddcn_2_0_0_offset.h10646 #define mmDP_AUX3_AUX_INTERRUPT_CONTROL … macro
H A Ddcn_3_0_0_offset.h10363 #define mmDP_AUX3_AUX_INTERRUPT_CONTROL … macro